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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h File Reference</title>
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<div class="header">
  <div class="headertitle"><div class="title">stm32h7xx_hal_tim.h File Reference</div></div>
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<p>Header file of TIM HAL module.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="stm32h7xx__hal__def_8h_source.html">stm32h7xx_hal_def.h</a>&quot;</code><br />
<code>#include &quot;<a class="el" href="stm32h7xx__hal__tim__ex_8h_source.html">stm32h7xx_hal_tim_ex.h</a>&quot;</code><br />
</div>
<p><a href="stm32h7xx__hal__tim_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-nested-classes" class="groupheader"><a id="nested-classes" name="nested-classes"></a>
Classes</h2></td></tr>
<tr class="memitem:TIM_5FBase_5FInitTypeDef" id="r_TIM_5FBase_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___base___init_type_def.html">TIM_Base_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Time base Configuration Structure definition.  <a href="struct_t_i_m___base___init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FOC_5FInitTypeDef" id="r_TIM_5FOC_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c___init_type_def.html">TIM_OC_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Output Compare Configuration Structure definition.  <a href="struct_t_i_m___o_c___init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FOnePulse_5FInitTypeDef" id="r_TIM_5FOnePulse_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___one_pulse___init_type_def.html">TIM_OnePulse_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM One Pulse Mode Configuration Structure definition.  <a href="struct_t_i_m___one_pulse___init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FIC_5FInitTypeDef" id="r_TIM_5FIC_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___i_c___init_type_def.html">TIM_IC_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Input Capture Configuration Structure definition.  <a href="struct_t_i_m___i_c___init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FEncoder_5FInitTypeDef" id="r_TIM_5FEncoder_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___encoder___init_type_def.html">TIM_Encoder_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Encoder Configuration Structure definition.  <a href="struct_t_i_m___encoder___init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FClockConfigTypeDef" id="r_TIM_5FClockConfigTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___clock_config_type_def.html">TIM_ClockConfigTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock Configuration Handle Structure definition.  <a href="struct_t_i_m___clock_config_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FClearInputConfigTypeDef" id="r_TIM_5FClearInputConfigTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___clear_input_config_type_def.html">TIM_ClearInputConfigTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Clear Input Configuration Handle Structure definition.  <a href="struct_t_i_m___clear_input_config_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FMasterConfigTypeDef" id="r_TIM_5FMasterConfigTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___master_config_type_def.html">TIM_MasterConfigTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Master configuration Structure definition.  <a href="struct_t_i_m___master_config_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FSlaveConfigTypeDef" id="r_TIM_5FSlaveConfigTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___slave_config_type_def.html">TIM_SlaveConfigTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Slave configuration Structure definition.  <a href="struct_t_i_m___slave_config_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FBreakDeadTimeConfigTypeDef" id="r_TIM_5FBreakDeadTimeConfigTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___break_dead_time_config_type_def.html">TIM_BreakDeadTimeConfigTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Break input(s) and Dead time configuration Structure definition.  <a href="struct_t_i_m___break_dead_time_config_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:TIM_5FHandleTypeDef" id="r_TIM_5FHandleTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Time Base Handle Structure definition.  <a href="struct_t_i_m___handle_type_def.html#details">More...</a><br /></td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga48c5312aecd377fab00d62e9b4169e9e" id="r_ga48c5312aecd377fab00d62e9b4169e9e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___source.html#ga48c5312aecd377fab00d62e9b4169e9e">TIM_CLEARINPUTSOURCE_NONE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaa28a8cf1db85cf6c845c6c1f02ba5c8e" id="r_gaa28a8cf1db85cf6c845c6c1f02ba5c8e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___source.html#gaa28a8cf1db85cf6c845c6c1f02ba5c8e">TIM_CLEARINPUTSOURCE_ETR</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memitem:ga97bbe74e5ae8680c020a6b0f760d8909" id="r_ga97bbe74e5ae8680c020a6b0f760d8909"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CR1</b>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga53d60ce92015bb60d608e60c45b1fdda" id="r_ga53d60ce92015bb60d608e60c45b1fdda"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CR2</b>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memitem:ga184ad86a4c6d48263f57d3e7106675c4" id="r_ga184ad86a4c6d48263f57d3e7106675c4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_SMCR</b>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memitem:ga137d2e3858ae68333646fea6e04503da" id="r_ga137d2e3858ae68333646fea6e04503da"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_DIER</b>&#160;&#160;&#160;0x00000003U</td></tr>
<tr class="memitem:gaf0da2213e3e7b6aaaa9b738ec85abc02" id="r_gaf0da2213e3e7b6aaaa9b738ec85abc02"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_SR</b>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memitem:gaff6d230aafb918047d62e877d21b3bdc" id="r_gaff6d230aafb918047d62e877d21b3bdc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_EGR</b>&#160;&#160;&#160;0x00000005U</td></tr>
<tr class="memitem:gac94d74bf77d5ce139c7fa6e0b8c2da44" id="r_gac94d74bf77d5ce139c7fa6e0b8c2da44"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCMR1</b>&#160;&#160;&#160;0x00000006U</td></tr>
<tr class="memitem:ga94f3dcf13674f397fee0ef816ad973cf" id="r_ga94f3dcf13674f397fee0ef816ad973cf"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCMR2</b>&#160;&#160;&#160;0x00000007U</td></tr>
<tr class="memitem:ga64cb24a6d9d96d950be64586923c7447" id="r_ga64cb24a6d9d96d950be64586923c7447"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCER</b>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memitem:gae711483dbf4f0eafb2505b8f823c4724" id="r_gae711483dbf4f0eafb2505b8f823c4724"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CNT</b>&#160;&#160;&#160;0x00000009U</td></tr>
<tr class="memitem:gae23315a3ef1af7dccfbbfada90355bd8" id="r_gae23315a3ef1af7dccfbbfada90355bd8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_PSC</b>&#160;&#160;&#160;0x0000000AU</td></tr>
<tr class="memitem:ga3e08cd689d59f76dd5ca958a0ffdfb3d" id="r_ga3e08cd689d59f76dd5ca958a0ffdfb3d"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_ARR</b>&#160;&#160;&#160;0x0000000BU</td></tr>
<tr class="memitem:gac26cff34f1d207798b946c01a40f5d89" id="r_gac26cff34f1d207798b946c01a40f5d89"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_RCR</b>&#160;&#160;&#160;0x0000000CU</td></tr>
<tr class="memitem:ga2d1bc7e5ae83b91caa352276d15142dc" id="r_ga2d1bc7e5ae83b91caa352276d15142dc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCR1</b>&#160;&#160;&#160;0x0000000DU</td></tr>
<tr class="memitem:ga0c73e7e1fa212ab14a43ca49e9d8850e" id="r_ga0c73e7e1fa212ab14a43ca49e9d8850e"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCR2</b>&#160;&#160;&#160;0x0000000EU</td></tr>
<tr class="memitem:gae3c259f405c78e31411c19195eac48bc" id="r_gae3c259f405c78e31411c19195eac48bc"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCR3</b>&#160;&#160;&#160;0x0000000FU</td></tr>
<tr class="memitem:gaea24fd3f528163da065cbdce3c68ef23" id="r_gaea24fd3f528163da065cbdce3c68ef23"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCR4</b>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memitem:ga767eab033d485d32de80b46f70be3341" id="r_ga767eab033d485d32de80b46f70be3341"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_BDTR</b>&#160;&#160;&#160;0x00000011U</td></tr>
<tr class="memitem:gab3e5aaf0cb815b4a2469d3046eca0201" id="r_gab3e5aaf0cb815b4a2469d3046eca0201"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_DCR</b>&#160;&#160;&#160;0x00000012U</td></tr>
<tr class="memitem:gafc79c60f0295d440ba3ed3bb3c73c739" id="r_gafc79c60f0295d440ba3ed3bb3c73c739"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_DMAR</b>&#160;&#160;&#160;0x00000013U</td></tr>
<tr class="memitem:ga48a6df471e6a42271b3c6ef7072204ea" id="r_ga48a6df471e6a42271b3c6ef7072204ea"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCMR3</b>&#160;&#160;&#160;0x00000015U</td></tr>
<tr class="memitem:ga219e3fff69fa9b9d564fa4d604072be8" id="r_ga219e3fff69fa9b9d564fa4d604072be8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCR5</b>&#160;&#160;&#160;0x00000016U</td></tr>
<tr class="memitem:ga8cf977b2548574072f45cfd7eca6b5c5" id="r_ga8cf977b2548574072f45cfd7eca6b5c5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_CCR6</b>&#160;&#160;&#160;0x00000017U</td></tr>
<tr class="memitem:ga74f6dd79db47fef4f9f8cb71f43454c5" id="r_ga74f6dd79db47fef4f9f8cb71f43454c5"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMABASE_TISEL</b>&#160;&#160;&#160;0x0000001AU</td></tr>
<tr class="memitem:ga6b9d1352735d2ddbafcaa31ae05cd1ee" id="r_ga6b9d1352735d2ddbafcaa31ae05cd1ee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga6b9d1352735d2ddbafcaa31ae05cd1ee">TIM_EVENTSOURCE_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga16f52a8e9aad153223405b965566ae91">TIM_EGR_UG</a></td></tr>
<tr class="memitem:ga529eadf26cd17108dd95b9707a3d0f55" id="r_ga529eadf26cd17108dd95b9707a3d0f55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga529eadf26cd17108dd95b9707a3d0f55">TIM_EVENTSOURCE_CC1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0a1318609761df5de5213e9e75b5aa6a">TIM_EGR_CC1G</a></td></tr>
<tr class="memitem:ga12e3a98c601f4f288354ac2538050e6b" id="r_ga12e3a98c601f4f288354ac2538050e6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga12e3a98c601f4f288354ac2538050e6b">TIM_EVENTSOURCE_CC2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5423de00e86aeb8a4657a509af485055">TIM_EGR_CC2G</a></td></tr>
<tr class="memitem:ga1c2faf942ab525b44299ddd0a6d848e4" id="r_ga1c2faf942ab525b44299ddd0a6d848e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga1c2faf942ab525b44299ddd0a6d848e4">TIM_EVENTSOURCE_CC3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga064d2030abccc099ded418fd81d6aa07">TIM_EGR_CC3G</a></td></tr>
<tr class="memitem:ga157e43c99e6a1c0097b184cc842b5dfb" id="r_ga157e43c99e6a1c0097b184cc842b5dfb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga157e43c99e6a1c0097b184cc842b5dfb">TIM_EVENTSOURCE_CC4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1c4e5555dd3be8ab1e631d1053f4a305">TIM_EGR_CC4G</a></td></tr>
<tr class="memitem:ga5724ce4aaf842a2166edaaff1531c1d1" id="r_ga5724ce4aaf842a2166edaaff1531c1d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga5724ce4aaf842a2166edaaff1531c1d1">TIM_EVENTSOURCE_COM</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gadb06f8bb364307695c7d6a028391de7b">TIM_EGR_COMG</a></td></tr>
<tr class="memitem:ga85573ed76442490db67e4b759fe6d901" id="r_ga85573ed76442490db67e4b759fe6d901"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga85573ed76442490db67e4b759fe6d901">TIM_EVENTSOURCE_TRIGGER</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2eabface433d6adaa2dee3df49852585">TIM_EGR_TG</a></td></tr>
<tr class="memitem:ga83d16368fe3172a98c41d7c414780a64" id="r_ga83d16368fe3172a98c41d7c414780a64"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga83d16368fe3172a98c41d7c414780a64">TIM_EVENTSOURCE_BREAK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga08c5635a0ac0ce5618485319a4fa0f18">TIM_EGR_BG</a></td></tr>
<tr class="memitem:ga1fc597b9937cc1cbc09b0e4450ad55fc" id="r_ga1fc597b9937cc1cbc09b0e4450ad55fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___event___source.html#ga1fc597b9937cc1cbc09b0e4450ad55fc">TIM_EVENTSOURCE_BREAK2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga42a7335ccbf7565d45b3efd51c213af2">TIM_EGR_B2G</a></td></tr>
<tr class="memitem:ga4f4cede88a4ad4b33e81f2567e9bb08f" id="r_ga4f4cede88a4ad4b33e81f2567e9bb08f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___channel___polarity.html#ga4f4cede88a4ad4b33e81f2567e9bb08f">TIM_INPUTCHANNELPOLARITY_RISING</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga07441a8c0a52234e30f471c23803450c" id="r_ga07441a8c0a52234e30f471c23803450c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___channel___polarity.html#ga07441a8c0a52234e30f471c23803450c">TIM_INPUTCHANNELPOLARITY_FALLING</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0ca0aedba14241caff739afb3c3ee291">TIM_CCER_CC1P</a></td></tr>
<tr class="memitem:gaab2598881d1f19158e77723c5d29d6ac" id="r_gaab2598881d1f19158e77723c5d29d6ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___channel___polarity.html#gaab2598881d1f19158e77723c5d29d6ac">TIM_INPUTCHANNELPOLARITY_BOTHEDGE</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga0ca0aedba14241caff739afb3c3ee291">TIM_CCER_CC1P</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga403fc501d4d8de6cabee6b07acb81a36">TIM_CCER_CC1NP</a>)</td></tr>
<tr class="memitem:ga42652ff688f0042659f8304ae08abfa6" id="r_ga42652ff688f0042659f8304ae08abfa6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___e_t_r___polarity.html#ga42652ff688f0042659f8304ae08abfa6">TIM_ETRPOLARITY_INVERTED</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2a5f335c3d7a4f82d1e91dc1511e3322">TIM_SMCR_ETP</a></td></tr>
<tr class="memitem:ga7fa7c43245b25564414b2e191d5d8b14" id="r_ga7fa7c43245b25564414b2e191d5d8b14"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___e_t_r___polarity.html#ga7fa7c43245b25564414b2e191d5d8b14">TIM_ETRPOLARITY_NONINVERTED</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gabead5364c62645592e42545ba09ab88a" id="r_gabead5364c62645592e42545ba09ab88a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___e_t_r___prescaler.html#gabead5364c62645592e42545ba09ab88a">TIM_ETRPRESCALER_DIV1</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaf7fe49f67bdb6b33b9b41953fee75680" id="r_gaf7fe49f67bdb6b33b9b41953fee75680"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaf7fe49f67bdb6b33b9b41953fee75680">TIM_ETRPRESCALER_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga00b43cd09557a69ed10471ed76b228d8">TIM_SMCR_ETPS_0</a></td></tr>
<tr class="memitem:gaa09da30c3cd28f1fe6b6f3f599a5212c" id="r_gaa09da30c3cd28f1fe6b6f3f599a5212c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaa09da30c3cd28f1fe6b6f3f599a5212c">TIM_ETRPRESCALER_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabf12f04862dbc92ca238d1518b27b16b">TIM_SMCR_ETPS_1</a></td></tr>
<tr class="memitem:ga834e38200874cced108379b17a24d0b7" id="r_ga834e38200874cced108379b17a24d0b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___e_t_r___prescaler.html#ga834e38200874cced108379b17a24d0b7">TIM_ETRPRESCALER_DIV8</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0ebb9e631876435e276211d88e797386">TIM_SMCR_ETPS</a></td></tr>
<tr class="memitem:ga9eb9ab91119c2c76d4db453d599c0b7d" id="r_ga9eb9ab91119c2c76d4db453d599c0b7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___counter___mode.html#ga9eb9ab91119c2c76d4db453d599c0b7d">TIM_COUNTERMODE_UP</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga5f590fdd7c41df7180b870bb76ff691c" id="r_ga5f590fdd7c41df7180b870bb76ff691c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___counter___mode.html#ga5f590fdd7c41df7180b870bb76ff691c">TIM_COUNTERMODE_DOWN</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacea10770904af189f3aaeb97b45722aa">TIM_CR1_DIR</a></td></tr>
<tr class="memitem:ga26d8e5236c35d85c2abaa482b5ec6746" id="r_ga26d8e5236c35d85c2abaa482b5ec6746"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___counter___mode.html#ga26d8e5236c35d85c2abaa482b5ec6746">TIM_COUNTERMODE_CENTERALIGNED1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga83ca6f7810aba73dc8c12f22092d97a2">TIM_CR1_CMS_0</a></td></tr>
<tr class="memitem:gae4517c68086ffa61a694576cec8fe634" id="r_gae4517c68086ffa61a694576cec8fe634"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___counter___mode.html#gae4517c68086ffa61a694576cec8fe634">TIM_COUNTERMODE_CENTERALIGNED2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab3ee4adcde3c001d3b97d2eae1730ea9">TIM_CR1_CMS_1</a></td></tr>
<tr class="memitem:gaf0c3edf6ea1ade3520ab4970e1fc6e92" id="r_gaf0c3edf6ea1ade3520ab4970e1fc6e92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___counter___mode.html#gaf0c3edf6ea1ade3520ab4970e1fc6e92">TIM_COUNTERMODE_CENTERALIGNED3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga352b3c389bde13dd6049de0afdd874f1">TIM_CR1_CMS</a></td></tr>
<tr class="memitem:gaaeea7464e7ff856b77ed6c851b17e2e5" id="r_gaaeea7464e7ff856b77ed6c851b17e2e5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___update___interrupt___flag___remap.html#gaaeea7464e7ff856b77ed6c851b17e2e5">TIM_UIFREMAP_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaac447513149e2f28e7cd66f1810cfa0b" id="r_gaac447513149e2f28e7cd66f1810cfa0b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___update___interrupt___flag___remap.html#gaac447513149e2f28e7cd66f1810cfa0b">TIM_UIFREMAP_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf0c8b29f2a8d1426cf31270643d811c7">TIM_CR1_UIFREMAP</a></td></tr>
<tr class="memitem:ga309297ccd407a836ede6a42d4dc479c1" id="r_ga309297ccd407a836ede6a42d4dc479c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock_division.html#ga309297ccd407a836ede6a42d4dc479c1">TIM_CLOCKDIVISION_DIV1</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaf84a16da8edb80a3d8af91fbfc046181" id="r_gaf84a16da8edb80a3d8af91fbfc046181"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock_division.html#gaf84a16da8edb80a3d8af91fbfc046181">TIM_CLOCKDIVISION_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga458d536d82aa3db7d227b0f00b36808f">TIM_CR1_CKD_0</a></td></tr>
<tr class="memitem:ga7cac7491610ffc135ea9ed54f769ddbc" id="r_ga7cac7491610ffc135ea9ed54f769ddbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock_division.html#ga7cac7491610ffc135ea9ed54f769ddbc">TIM_CLOCKDIVISION_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7ff2d6c2c350e8b719a8ad49c9a6bcbe">TIM_CR1_CKD_1</a></td></tr>
<tr class="memitem:ga98fa585adffeb0d3654b47040576c6b7" id="r_ga98fa585adffeb0d3654b47040576c6b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___state.html#ga98fa585adffeb0d3654b47040576c6b7">TIM_OUTPUTSTATE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga114555abc521311f689478a7e0a9ace9" id="r_ga114555abc521311f689478a7e0a9ace9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___state.html#ga114555abc521311f689478a7e0a9ace9">TIM_OUTPUTSTATE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3f494b9881e7b97bb2d79f7ad4e79937">TIM_CCER_CC1E</a></td></tr>
<tr class="memitem:ga4d0cf7e2800d0ab10f3f0ebfac11c9c7" id="r_ga4d0cf7e2800d0ab10f3f0ebfac11c9c7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___auto_reload_preload.html#ga4d0cf7e2800d0ab10f3f0ebfac11c9c7">TIM_AUTORELOAD_PRELOAD_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaaa36f0c74b1d1ec83b0c105bfedfa309" id="r_gaaa36f0c74b1d1ec83b0c105bfedfa309"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___auto_reload_preload.html#gaaa36f0c74b1d1ec83b0c105bfedfa309">TIM_AUTORELOAD_PRELOAD_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4a3ad409f6b147cdcbafbfe29102f3fd">TIM_CR1_ARPE</a></td></tr>
<tr class="memitem:ga71429b63f2a6604171ccfd3a91ccf43a" id="r_ga71429b63f2a6604171ccfd3a91ccf43a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___fast___state.html#ga71429b63f2a6604171ccfd3a91ccf43a">TIM_OCFAST_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga445a2c0633ac649e816cf7a16b716d61" id="r_ga445a2c0633ac649e816cf7a16b716d61"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___fast___state.html#ga445a2c0633ac649e816cf7a16b716d61">TIM_OCFAST_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab9c5878e85ce02c22d8a374deebd1b6e">TIM_CCMR1_OC1FE</a></td></tr>
<tr class="memitem:ga07bb7288fc4ed155301a3276908a23a0" id="r_ga07bb7288fc4ed155301a3276908a23a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___n___state.html#ga07bb7288fc4ed155301a3276908a23a0">TIM_OUTPUTNSTATE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga3323d8c81a7f3940aa290d160dea3e0d" id="r_ga3323d8c81a7f3940aa290d160dea3e0d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___n___state.html#ga3323d8c81a7f3940aa290d160dea3e0d">TIM_OUTPUTNSTATE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga813056b3f90a13c4432aeba55f28957e">TIM_CCER_CC1NE</a></td></tr>
<tr class="memitem:ga5887380660b742f0045e9695914231b8" id="r_ga5887380660b742f0045e9695914231b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___polarity.html#ga5887380660b742f0045e9695914231b8">TIM_OCPOLARITY_HIGH</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga1daff1574b0a2d17ccc9ae40a649ac37" id="r_ga1daff1574b0a2d17ccc9ae40a649ac37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___polarity.html#ga1daff1574b0a2d17ccc9ae40a649ac37">TIM_OCPOLARITY_LOW</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0ca0aedba14241caff739afb3c3ee291">TIM_CCER_CC1P</a></td></tr>
<tr class="memitem:gad5dbeb61519e4fd55db3a4d136e96316" id="r_gad5dbeb61519e4fd55db3a4d136e96316"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___n___polarity.html#gad5dbeb61519e4fd55db3a4d136e96316">TIM_OCNPOLARITY_HIGH</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gadb44419c891a58e2cde11cc016f71a14" id="r_gadb44419c891a58e2cde11cc016f71a14"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___n___polarity.html#gadb44419c891a58e2cde11cc016f71a14">TIM_OCNPOLARITY_LOW</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga403fc501d4d8de6cabee6b07acb81a36">TIM_CCER_CC1NP</a></td></tr>
<tr class="memitem:gad251b83b0e33ddd0ed2fb35aa747ef78" id="r_gad251b83b0e33ddd0ed2fb35aa747ef78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___idle___state.html#gad251b83b0e33ddd0ed2fb35aa747ef78">TIM_OCIDLESTATE_SET</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga31b26bf058f88d771c33aff85ec89358">TIM_CR2_OIS1</a></td></tr>
<tr class="memitem:ga56505fe4142096454f1da97683ce8bc2" id="r_ga56505fe4142096454f1da97683ce8bc2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___idle___state.html#ga56505fe4142096454f1da97683ce8bc2">TIM_OCIDLESTATE_RESET</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga1f781774c71822b2502633dfc849c5ea" id="r_ga1f781774c71822b2502633dfc849c5ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___n___idle___state.html#ga1f781774c71822b2502633dfc849c5ea">TIM_OCNIDLESTATE_SET</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae61f8d54923999fffb6db381e81f2b69">TIM_CR2_OIS1N</a></td></tr>
<tr class="memitem:ga7586655652e3c3f1cb4af1ed59d25901" id="r_ga7586655652e3c3f1cb4af1ed59d25901"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare___n___idle___state.html#ga7586655652e3c3f1cb4af1ed59d25901">TIM_OCNIDLESTATE_RESET</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gac79dd2a7ba97e5aac0bb9cbdc2d02ee1" id="r_gac79dd2a7ba97e5aac0bb9cbdc2d02ee1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___polarity.html#gac79dd2a7ba97e5aac0bb9cbdc2d02ee1">TIM_ICPOLARITY_RISING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga4f4cede88a4ad4b33e81f2567e9bb08f">TIM_INPUTCHANNELPOLARITY_RISING</a></td></tr>
<tr class="memitem:gaec0c00d0b749e8c18101cefcce7c32f6" id="r_gaec0c00d0b749e8c18101cefcce7c32f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___polarity.html#gaec0c00d0b749e8c18101cefcce7c32f6">TIM_ICPOLARITY_FALLING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga07441a8c0a52234e30f471c23803450c">TIM_INPUTCHANNELPOLARITY_FALLING</a></td></tr>
<tr class="memitem:ga7a340c94a7bd0fa4a915afa8788e0b71" id="r_ga7a340c94a7bd0fa4a915afa8788e0b71"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___polarity.html#ga7a340c94a7bd0fa4a915afa8788e0b71">TIM_ICPOLARITY_BOTHEDGE</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#gaab2598881d1f19158e77723c5d29d6ac">TIM_INPUTCHANNELPOLARITY_BOTHEDGE</a></td></tr>
<tr class="memitem:gac015dd6602fcaa8dec8208e773f5921c" id="r_gac015dd6602fcaa8dec8208e773f5921c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___encoder___input___polarity.html#gac015dd6602fcaa8dec8208e773f5921c">TIM_ENCODERINPUTPOLARITY_RISING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga4f4cede88a4ad4b33e81f2567e9bb08f">TIM_INPUTCHANNELPOLARITY_RISING</a></td></tr>
<tr class="memitem:gaf0e5158977c8d2fab26ff6dcdbc84ae6" id="r_gaf0e5158977c8d2fab26ff6dcdbc84ae6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___encoder___input___polarity.html#gaf0e5158977c8d2fab26ff6dcdbc84ae6">TIM_ENCODERINPUTPOLARITY_FALLING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga07441a8c0a52234e30f471c23803450c">TIM_INPUTCHANNELPOLARITY_FALLING</a></td></tr>
<tr class="memitem:gac3be2fd9c576e84e0ebcfc7b3c0773a3" id="r_gac3be2fd9c576e84e0ebcfc7b3c0773a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___selection.html#gac3be2fd9c576e84e0ebcfc7b3c0773a3">TIM_ICSELECTION_DIRECTTI</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1e4968b5500d58d1aebce888da31eb5d">TIM_CCMR1_CC1S_0</a></td></tr>
<tr class="memitem:gab9754d4318abcd7fe725e3ee2e4496d4" id="r_gab9754d4318abcd7fe725e3ee2e4496d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___selection.html#gab9754d4318abcd7fe725e3ee2e4496d4">TIM_ICSELECTION_INDIRECTTI</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga299207b757f31c9c02471ab5f4f59dbe">TIM_CCMR1_CC1S_1</a></td></tr>
<tr class="memitem:ga9e0191bbf1a82dd9150b9283c39276e7" id="r_ga9e0191bbf1a82dd9150b9283c39276e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___selection.html#ga9e0191bbf1a82dd9150b9283c39276e7">TIM_ICSELECTION_TRC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga95291df1eaf532c5c996d176648938eb">TIM_CCMR1_CC1S</a></td></tr>
<tr class="memitem:ga8acb44abe3147d883685c1f9f1ce410e" id="r_ga8acb44abe3147d883685c1f9f1ce410e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___prescaler.html#ga8acb44abe3147d883685c1f9f1ce410e">TIM_ICPSC_DIV1</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga1d8a7b66add914e2ddd910d2d700978f" id="r_ga1d8a7b66add914e2ddd910d2d700978f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___prescaler.html#ga1d8a7b66add914e2ddd910d2d700978f">TIM_ICPSC_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga05673358a44aeaa56daefca67341b29d">TIM_CCMR1_IC1PSC_0</a></td></tr>
<tr class="memitem:gaf5a675046430fa0f0c95b0dac612828f" id="r_gaf5a675046430fa0f0c95b0dac612828f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___prescaler.html#gaf5a675046430fa0f0c95b0dac612828f">TIM_ICPSC_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf42b75da9b2f127dca98b6ca616f7add">TIM_CCMR1_IC1PSC_1</a></td></tr>
<tr class="memitem:ga5086cb03c89a5c67b199d20b605f00cb" id="r_ga5086cb03c89a5c67b199d20b605f00cb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___input___capture___prescaler.html#ga5086cb03c89a5c67b199d20b605f00cb">TIM_ICPSC_DIV8</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab46b7186665f5308cd2ca52acfb63e72">TIM_CCMR1_IC1PSC</a></td></tr>
<tr class="memitem:gab0447b341024e86145c7ce0dc2931fc6" id="r_gab0447b341024e86145c7ce0dc2931fc6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___one___pulse___mode.html#gab0447b341024e86145c7ce0dc2931fc6">TIM_OPMODE_SINGLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6d3d1488296350af6d36fbbf71905d29">TIM_CR1_OPM</a></td></tr>
<tr class="memitem:ga14a7b6f95769c5b430f65189d9c7cfa3" id="r_ga14a7b6f95769c5b430f65189d9c7cfa3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___one___pulse___mode.html#ga14a7b6f95769c5b430f65189d9c7cfa3">TIM_OPMODE_REPETITIVE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaff047abefa78b0f0a7bbd0f648905d7d" id="r_gaff047abefa78b0f0a7bbd0f648905d7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___encoder___mode.html#gaff047abefa78b0f0a7bbd0f648905d7d">TIM_ENCODERMODE_TI1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7d1ebece401aeb12abd466d2eafa78b2">TIM_SMCR_SMS_0</a></td></tr>
<tr class="memitem:ga9166e985a35358cb3ed942c2a36e018d" id="r_ga9166e985a35358cb3ed942c2a36e018d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___encoder___mode.html#ga9166e985a35358cb3ed942c2a36e018d">TIM_ENCODERMODE_TI2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa980a3121ab6cda5a4a42b959da8421e">TIM_SMCR_SMS_1</a></td></tr>
<tr class="memitem:ga8046f1021dc578551fcff88891239e67" id="r_ga8046f1021dc578551fcff88891239e67"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___encoder___mode.html#ga8046f1021dc578551fcff88891239e67">TIM_ENCODERMODE_TI12</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa980a3121ab6cda5a4a42b959da8421e">TIM_SMCR_SMS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga7d1ebece401aeb12abd466d2eafa78b2">TIM_SMCR_SMS_0</a>)</td></tr>
<tr class="memitem:ga6a48ecf88cae0402ff084202bfdd4f8e" id="r_ga6a48ecf88cae0402ff084202bfdd4f8e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga6a48ecf88cae0402ff084202bfdd4f8e">TIM_IT_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5c6d3e0495e6c06da4bdd0ad8995a32b">TIM_DIER_UIE</a></td></tr>
<tr class="memitem:ga02267a938ab4722c5013fffa447cf5a6" id="r_ga02267a938ab4722c5013fffa447cf5a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga02267a938ab4722c5013fffa447cf5a6">TIM_IT_CC1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1ba7f7ca97eeaf6cc23cd6765c6bf678">TIM_DIER_CC1IE</a></td></tr>
<tr class="memitem:ga60f6b6c424b62ca58d3fafd8f5955e4f" id="r_ga60f6b6c424b62ca58d3fafd8f5955e4f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga60f6b6c424b62ca58d3fafd8f5955e4f">TIM_IT_CC2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga757c59b690770adebf33e20d3d9dec15">TIM_DIER_CC2IE</a></td></tr>
<tr class="memitem:ga6aef020aebafd9e585283fbbaf8b841f" id="r_ga6aef020aebafd9e585283fbbaf8b841f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga6aef020aebafd9e585283fbbaf8b841f">TIM_IT_CC3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4edf003f04bcf250bddf5ed284201c2e">TIM_DIER_CC3IE</a></td></tr>
<tr class="memitem:ga1dce7f1bc32a258f2964cb7c05f413a6" id="r_ga1dce7f1bc32a258f2964cb7c05f413a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga1dce7f1bc32a258f2964cb7c05f413a6">TIM_IT_CC4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6ad0f562a014572793b49fe87184338b">TIM_DIER_CC4IE</a></td></tr>
<tr class="memitem:gaeb7eff6c39922814e7ee47c0820c3d9f" id="r_gaeb7eff6c39922814e7ee47c0820c3d9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#gaeb7eff6c39922814e7ee47c0820c3d9f">TIM_IT_COM</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gade8a374e04740aac1ece248b868522fe">TIM_DIER_COMIE</a></td></tr>
<tr class="memitem:ga2a577f2eee61f101cf551d86c4d73333" id="r_ga2a577f2eee61f101cf551d86c4d73333"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga2a577f2eee61f101cf551d86c4d73333">TIM_IT_TRIGGER</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa755fef2c4e96c63f2ea1cd9a32f956a">TIM_DIER_TIE</a></td></tr>
<tr class="memitem:ga351a8f27975e0af87f4bb37a4feaa636" id="r_ga351a8f27975e0af87f4bb37a4feaa636"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___interrupt__definition.html#ga351a8f27975e0af87f4bb37a4feaa636">TIM_IT_BREAK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1fcb0d6d9fb7486a5901032fd81aef6a">TIM_DIER_BIE</a></td></tr>
<tr class="memitem:gab2e11763b5e061a5b3056ac970f57ab1" id="r_gab2e11763b5e061a5b3056ac970f57ab1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___commutation___source.html#gab2e11763b5e061a5b3056ac970f57ab1">TIM_COMMUTATION_TRGI</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf0328c1339b2b1633ef7a8db4c02d0d5">TIM_CR2_CCUS</a></td></tr>
<tr class="memitem:ga9cd117a69cbca219c1cf29e74746a496" id="r_ga9cd117a69cbca219c1cf29e74746a496"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___commutation___source.html#ga9cd117a69cbca219c1cf29e74746a496">TIM_COMMUTATION_SOFTWARE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga45816ad15a4f533027eb202ac0b9aaf5" id="r_ga45816ad15a4f533027eb202ac0b9aaf5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#ga45816ad15a4f533027eb202ac0b9aaf5">TIM_DMA_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab9f47792b1c2f123464a2955f445c811">TIM_DIER_UDE</a></td></tr>
<tr class="memitem:ga33b93e8bb82fe8e167b9e9c962c54f83" id="r_ga33b93e8bb82fe8e167b9e9c962c54f83"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#ga33b93e8bb82fe8e167b9e9c962c54f83">TIM_DMA_CC1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae181bb16ec916aba8ba86f58f745fdfd">TIM_DIER_CC1DE</a></td></tr>
<tr class="memitem:ga792f73196a8e7424655592097d7a3fd5" id="r_ga792f73196a8e7424655592097d7a3fd5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#ga792f73196a8e7424655592097d7a3fd5">TIM_DMA_CC2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga58f97064991095b28c91028ca3cca28e">TIM_DIER_CC2DE</a></td></tr>
<tr class="memitem:ga3eb2dadbd3109bced45935fb53deeee1" id="r_ga3eb2dadbd3109bced45935fb53deeee1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#ga3eb2dadbd3109bced45935fb53deeee1">TIM_DMA_CC3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1567bff5dc0564b26a8b3cff1f0fe0a4">TIM_DIER_CC3DE</a></td></tr>
<tr class="memitem:ga59495cf79894dfe5e5b2029863aed956" id="r_ga59495cf79894dfe5e5b2029863aed956"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#ga59495cf79894dfe5e5b2029863aed956">TIM_DMA_CC4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaba034412c54fa07024e516492748614">TIM_DIER_CC4DE</a></td></tr>
<tr class="memitem:gac5f4c56e944bda8ba0c23b97275020ba" id="r_gac5f4c56e944bda8ba0c23b97275020ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#gac5f4c56e944bda8ba0c23b97275020ba">TIM_DMA_COM</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga79c3fab9d33de953a0a7f7d6516c73bc">TIM_DIER_COMDE</a></td></tr>
<tr class="memitem:ga21912fd910242e0f63bf9b0953e41c63" id="r_ga21912fd910242e0f63bf9b0953e41c63"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a__sources.html#ga21912fd910242e0f63bf9b0953e41c63">TIM_DMA_TRIGGER</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5a752d4295f100708df9b8be5a7f439d">TIM_DIER_TDE</a></td></tr>
<tr class="memitem:ga76d609eb939a2594b34a3f1d86b71daa" id="r_ga76d609eb939a2594b34a3f1d86b71daa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___c_c___d_m_a___request.html#ga76d609eb939a2594b34a3f1d86b71daa">TIM_CCDMAREQUEST_CC</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga02de77c6d6d3474c33235e82b4081bb5" id="r_ga02de77c6d6d3474c33235e82b4081bb5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___c_c___d_m_a___request.html#ga02de77c6d6d3474c33235e82b4081bb5">TIM_CCDMAREQUEST_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gade656832d3ec303a2a7a422638dd560e">TIM_CR2_CCDS</a></td></tr>
<tr class="memitem:gac45ce66cf33b4f324323fc3036917712" id="r_gac45ce66cf33b4f324323fc3036917712"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gac45ce66cf33b4f324323fc3036917712">TIM_FLAG_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8c03fabc10654d2a3f76ea40fcdbde6">TIM_SR_UIF</a></td></tr>
<tr class="memitem:gaa7eb8be054b9bd217a9abb1c8687cc55" id="r_gaa7eb8be054b9bd217a9abb1c8687cc55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gaa7eb8be054b9bd217a9abb1c8687cc55">TIM_FLAG_CC1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga449a61344a97608d85384c29f003c0e9">TIM_SR_CC1IF</a></td></tr>
<tr class="memitem:ga9cae242f1c51b31839ffc5bc007c82a7" id="r_ga9cae242f1c51b31839ffc5bc007c82a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga9cae242f1c51b31839ffc5bc007c82a7">TIM_FLAG_CC2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga25a48bf099467169aa50464fbf462bd8">TIM_SR_CC2IF</a></td></tr>
<tr class="memitem:ga052c380f922219659810e4fceb574a7c" id="r_ga052c380f922219659810e4fceb574a7c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga052c380f922219659810e4fceb574a7c">TIM_FLAG_CC3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad3cf234a1059c0a04799e88382cdc0f2">TIM_SR_CC3IF</a></td></tr>
<tr class="memitem:gafd0dc57b56941f8b8250d66e289542db" id="r_gafd0dc57b56941f8b8250d66e289542db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gafd0dc57b56941f8b8250d66e289542db">TIM_FLAG_CC4</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacade8a06303bf216bfb03140c7e16cac">TIM_SR_CC4IF</a></td></tr>
<tr class="memitem:gab00cd0136baf5fc6a113a7395982ed81" id="r_gab00cd0136baf5fc6a113a7395982ed81"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gab00cd0136baf5fc6a113a7395982ed81">TIM_FLAG_CC5</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2167773377ba03c863cc49342c67789f">TIM_SR_CC5IF</a></td></tr>
<tr class="memitem:ga6ec646997baea79b25d49e2b793c03d0" id="r_ga6ec646997baea79b25d49e2b793c03d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga6ec646997baea79b25d49e2b793c03d0">TIM_FLAG_CC6</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad16e2f81b0c4fe28e323f3302c2240db">TIM_SR_CC6IF</a></td></tr>
<tr class="memitem:gad454d70205ce5bbf3b3c0e7e43d6df62" id="r_gad454d70205ce5bbf3b3c0e7e43d6df62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gad454d70205ce5bbf3b3c0e7e43d6df62">TIM_FLAG_COM</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga91775c029171c4585e9cca6ebf1cd57a">TIM_SR_COMIF</a></td></tr>
<tr class="memitem:gacacf94fcf8b5ee4287f2d5a56dce91b7" id="r_gacacf94fcf8b5ee4287f2d5a56dce91b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gacacf94fcf8b5ee4287f2d5a56dce91b7">TIM_FLAG_TRIGGER</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7c8b16f3ced6ec03e9001276b134846e">TIM_SR_TIF</a></td></tr>
<tr class="memitem:ga01aedbe0676064a4d47dee474ddb863d" id="r_ga01aedbe0676064a4d47dee474ddb863d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga01aedbe0676064a4d47dee474ddb863d">TIM_FLAG_BREAK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6d52cd5a57c9a26b0d993c93d9875097">TIM_SR_BIF</a></td></tr>
<tr class="memitem:ga70cd9741ad1ec0358c8d4388a5082e1a" id="r_ga70cd9741ad1ec0358c8d4388a5082e1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga70cd9741ad1ec0358c8d4388a5082e1a">TIM_FLAG_BREAK2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaef0c136d9338baf71a64ff650b385645">TIM_SR_B2IF</a></td></tr>
<tr class="memitem:gadea65e9637f032eee9d5693319d3ef62" id="r_gadea65e9637f032eee9d5693319d3ef62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gadea65e9637f032eee9d5693319d3ef62">TIM_FLAG_SYSTEM_BREAK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae6c84655ac31844ff644f796ef638e06">TIM_SR_SBIF</a></td></tr>
<tr class="memitem:ga38dfb7d1ed00af77d70bc3be28500108" id="r_ga38dfb7d1ed00af77d70bc3be28500108"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga38dfb7d1ed00af77d70bc3be28500108">TIM_FLAG_CC1OF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga819c4b27f8fa99b537c4407521f9780c">TIM_SR_CC1OF</a></td></tr>
<tr class="memitem:ga4df0c71d3e695c214d49802942e04590" id="r_ga4df0c71d3e695c214d49802942e04590"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#ga4df0c71d3e695c214d49802942e04590">TIM_FLAG_CC2OF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3b7798da5863d559ea9a642af6658050">TIM_SR_CC2OF</a></td></tr>
<tr class="memitem:gac81f24eaffdf83c2db9d2e6078a00919" id="r_gac81f24eaffdf83c2db9d2e6078a00919"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gac81f24eaffdf83c2db9d2e6078a00919">TIM_FLAG_CC3OF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf7a2d4c831eb641ba082156e41d03358">TIM_SR_CC3OF</a></td></tr>
<tr class="memitem:gafc8b04654766d98ba2c6fed601895a20" id="r_gafc8b04654766d98ba2c6fed601895a20"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___flag__definition.html#gafc8b04654766d98ba2c6fed601895a20">TIM_FLAG_CC4OF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga81ba979e8309b66808e06e4de34bc740">TIM_SR_CC4OF</a></td></tr>
<tr class="memitem:ga6b1541e4a49d62610899e24bf23f4879" id="r_ga6b1541e4a49d62610899e24bf23f4879"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#ga6b1541e4a49d62610899e24bf23f4879">TIM_CHANNEL_1</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga33e02d43345a7ac5886f01b39e4f7ccd" id="r_ga33e02d43345a7ac5886f01b39e4f7ccd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#ga33e02d43345a7ac5886f01b39e4f7ccd">TIM_CHANNEL_2</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memitem:ga4ea100c1789b178f3cb46721b7257e2d" id="r_ga4ea100c1789b178f3cb46721b7257e2d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#ga4ea100c1789b178f3cb46721b7257e2d">TIM_CHANNEL_3</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memitem:gad59ef74820ee8bf77fa1f8d589fde2ac" id="r_gad59ef74820ee8bf77fa1f8d589fde2ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#gad59ef74820ee8bf77fa1f8d589fde2ac">TIM_CHANNEL_4</a>&#160;&#160;&#160;0x0000000CU</td></tr>
<tr class="memitem:gae7a7e7ef775b2cce4dc5da3821c0703f" id="r_gae7a7e7ef775b2cce4dc5da3821c0703f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#gae7a7e7ef775b2cce4dc5da3821c0703f">TIM_CHANNEL_5</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memitem:gaf1042743f56a664b152ff0a03597807e" id="r_gaf1042743f56a664b152ff0a03597807e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#gaf1042743f56a664b152ff0a03597807e">TIM_CHANNEL_6</a>&#160;&#160;&#160;0x00000014U</td></tr>
<tr class="memitem:ga6abf8f9fc695b79d8781ca082dfb48bc" id="r_ga6abf8f9fc695b79d8781ca082dfb48bc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___channel.html#ga6abf8f9fc695b79d8781ca082dfb48bc">TIM_CHANNEL_ALL</a>&#160;&#160;&#160;0x0000003CU</td></tr>
<tr class="memitem:ga9b398a201d8b6a4f200ebde86b1d8f3a" id="r_ga9b398a201d8b6a4f200ebde86b1d8f3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga9b398a201d8b6a4f200ebde86b1d8f3a">TIM_CLOCKSOURCE_INTERNAL</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga00b43cd09557a69ed10471ed76b228d8">TIM_SMCR_ETPS_0</a></td></tr>
<tr class="memitem:gaa7743af6f4b8869cad0375526c6145ce" id="r_gaa7743af6f4b8869cad0375526c6145ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gaa7743af6f4b8869cad0375526c6145ce">TIM_CLOCKSOURCE_ETRMODE1</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#gaece08e02e056613a882aa7ff0a6ccc2d">TIM_TS_ETRF</a></td></tr>
<tr class="memitem:gab133f0839cf6a4e858457d48f057eea8" id="r_gab133f0839cf6a4e858457d48f057eea8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gab133f0839cf6a4e858457d48f057eea8">TIM_CLOCKSOURCE_ETRMODE2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabf12f04862dbc92ca238d1518b27b16b">TIM_SMCR_ETPS_1</a></td></tr>
<tr class="memitem:gad8c96337acf40356d82570cc4851ce2d" id="r_gad8c96337acf40356d82570cc4851ce2d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gad8c96337acf40356d82570cc4851ce2d">TIM_CLOCKSOURCE_TI1ED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga8c89554efc693e679c94b5a749af123c">TIM_TS_TI1F_ED</a></td></tr>
<tr class="memitem:ga0a8708d4dab5cbd557a76efb362e13c0" id="r_ga0a8708d4dab5cbd557a76efb362e13c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga0a8708d4dab5cbd557a76efb362e13c0">TIM_CLOCKSOURCE_TI1</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga38d3514d54bcdb0ea8ac8bd91c5832b5">TIM_TS_TI1FP1</a></td></tr>
<tr class="memitem:ga7950cf616702dd38d8f1ab5091efc012" id="r_ga7950cf616702dd38d8f1ab5091efc012"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga7950cf616702dd38d8f1ab5091efc012">TIM_CLOCKSOURCE_TI2</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga0ed58a269bccd3f22d19cc9a2ba3123f">TIM_TS_TI2FP2</a></td></tr>
<tr class="memitem:ga3310aa84f2f322eb77538997c070e56a" id="r_ga3310aa84f2f322eb77538997c070e56a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga3310aa84f2f322eb77538997c070e56a">TIM_CLOCKSOURCE_ITR0</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#gab7cf2b7db3956d4fd1e5a5d84f4891e7">TIM_TS_ITR0</a></td></tr>
<tr class="memitem:gae2da814f8d86491e7c344bb8d0f62b96" id="r_gae2da814f8d86491e7c344bb8d0f62b96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gae2da814f8d86491e7c344bb8d0f62b96">TIM_CLOCKSOURCE_ITR1</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#gad90fbca297153ca9c0112a67ea2c6cb3">TIM_TS_ITR1</a></td></tr>
<tr class="memitem:gafb779719a41769b14303da4977f6a5f1" id="r_gafb779719a41769b14303da4977f6a5f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gafb779719a41769b14303da4977f6a5f1">TIM_CLOCKSOURCE_ITR2</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga8599ba58a5f911d648503c7ac55d4320">TIM_TS_ITR2</a></td></tr>
<tr class="memitem:ga0cce2af04ad903ba683515c3772abb27" id="r_ga0cce2af04ad903ba683515c3772abb27"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga0cce2af04ad903ba683515c3772abb27">TIM_CLOCKSOURCE_ITR3</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga63183e611b91c5847040172c0069514d">TIM_TS_ITR3</a></td></tr>
<tr class="memitem:ga869284b7205403b15475ddc5ce7597f3" id="r_ga869284b7205403b15475ddc5ce7597f3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga869284b7205403b15475ddc5ce7597f3">TIM_CLOCKSOURCE_ITR4</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga97923e4805e15f379eafe4fa5f09fb44">TIM_TS_ITR4</a></td></tr>
<tr class="memitem:gadc2f6e532af4c3b35fb38c9ff6f03c84" id="r_gadc2f6e532af4c3b35fb38c9ff6f03c84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gadc2f6e532af4c3b35fb38c9ff6f03c84">TIM_CLOCKSOURCE_ITR5</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#gad0fea6ddb2a6c782a12cb7db0ce17df8">TIM_TS_ITR5</a></td></tr>
<tr class="memitem:gaf62603f38c172601f1a502da24835116" id="r_gaf62603f38c172601f1a502da24835116"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gaf62603f38c172601f1a502da24835116">TIM_CLOCKSOURCE_ITR6</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga539cd36541e24f7009713a4c48b036f0">TIM_TS_ITR6</a></td></tr>
<tr class="memitem:ga7f04b3d47791e081f4202ff370286f95" id="r_ga7f04b3d47791e081f4202ff370286f95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#ga7f04b3d47791e081f4202ff370286f95">TIM_CLOCKSOURCE_ITR7</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#ga5f454db2459d03ac796190f09fa75bbc">TIM_TS_ITR7</a></td></tr>
<tr class="memitem:gac1e30be36c703d8bb6a5dbc1b57675da" id="r_gac1e30be36c703d8bb6a5dbc1b57675da"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___source.html#gac1e30be36c703d8bb6a5dbc1b57675da">TIM_CLOCKSOURCE_ITR8</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___trigger___selection.html#gab84e0eb124670693149c7f1b775fb87b">TIM_TS_ITR8</a></td></tr>
<tr class="memitem:gae4eb585c466c2b5709ae3795204e7d3f" id="r_gae4eb585c466c2b5709ae3795204e7d3f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___polarity.html#gae4eb585c466c2b5709ae3795204e7d3f">TIM_CLOCKPOLARITY_INVERTED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___polarity.html#ga42652ff688f0042659f8304ae08abfa6">TIM_ETRPOLARITY_INVERTED</a></td></tr>
<tr class="memitem:gaca342866be2f9364274584688c733b60" id="r_gaca342866be2f9364274584688c733b60"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___polarity.html#gaca342866be2f9364274584688c733b60">TIM_CLOCKPOLARITY_NONINVERTED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___polarity.html#ga7fa7c43245b25564414b2e191d5d8b14">TIM_ETRPOLARITY_NONINVERTED</a></td></tr>
<tr class="memitem:ga13cc7002cfa5ee42607e1a3d85f77b10" id="r_ga13cc7002cfa5ee42607e1a3d85f77b10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___polarity.html#ga13cc7002cfa5ee42607e1a3d85f77b10">TIM_CLOCKPOLARITY_RISING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga4f4cede88a4ad4b33e81f2567e9bb08f">TIM_INPUTCHANNELPOLARITY_RISING</a></td></tr>
<tr class="memitem:ga9c17ca08b6179792f5ced4e607808c0a" id="r_ga9c17ca08b6179792f5ced4e607808c0a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___polarity.html#ga9c17ca08b6179792f5ced4e607808c0a">TIM_CLOCKPOLARITY_FALLING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga07441a8c0a52234e30f471c23803450c">TIM_INPUTCHANNELPOLARITY_FALLING</a></td></tr>
<tr class="memitem:ga89bf9a7962d09fb58ceae4d1e28e1c89" id="r_ga89bf9a7962d09fb58ceae4d1e28e1c89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___polarity.html#ga89bf9a7962d09fb58ceae4d1e28e1c89">TIM_CLOCKPOLARITY_BOTHEDGE</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#gaab2598881d1f19158e77723c5d29d6ac">TIM_INPUTCHANNELPOLARITY_BOTHEDGE</a></td></tr>
<tr class="memitem:ga3462b444a059f001c6df33f55c756313" id="r_ga3462b444a059f001c6df33f55c756313"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___prescaler.html#ga3462b444a059f001c6df33f55c756313">TIM_CLOCKPRESCALER_DIV1</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gabead5364c62645592e42545ba09ab88a">TIM_ETRPRESCALER_DIV1</a></td></tr>
<tr class="memitem:gac6457751c882644727982fda1fd029a5" id="r_gac6457751c882644727982fda1fd029a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___prescaler.html#gac6457751c882644727982fda1fd029a5">TIM_CLOCKPRESCALER_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaf7fe49f67bdb6b33b9b41953fee75680">TIM_ETRPRESCALER_DIV2</a></td></tr>
<tr class="memitem:ga11ce3686a0ee934384d0e4651823883d" id="r_ga11ce3686a0ee934384d0e4651823883d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___prescaler.html#ga11ce3686a0ee934384d0e4651823883d">TIM_CLOCKPRESCALER_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaa09da30c3cd28f1fe6b6f3f599a5212c">TIM_ETRPRESCALER_DIV4</a></td></tr>
<tr class="memitem:ga86f147be5654631b21aa391a001401d5" id="r_ga86f147be5654631b21aa391a001401d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clock___prescaler.html#ga86f147be5654631b21aa391a001401d5">TIM_CLOCKPRESCALER_DIV8</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#ga834e38200874cced108379b17a24d0b7">TIM_ETRPRESCALER_DIV8</a></td></tr>
<tr class="memitem:ga02e0d10a2cf90016d1a8be1931c6c67e" id="r_ga02e0d10a2cf90016d1a8be1931c6c67e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___polarity.html#ga02e0d10a2cf90016d1a8be1931c6c67e">TIM_CLEARINPUTPOLARITY_INVERTED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___polarity.html#ga42652ff688f0042659f8304ae08abfa6">TIM_ETRPOLARITY_INVERTED</a></td></tr>
<tr class="memitem:ga53e02f7692e6996389b462219572f2a9" id="r_ga53e02f7692e6996389b462219572f2a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___polarity.html#ga53e02f7692e6996389b462219572f2a9">TIM_CLEARINPUTPOLARITY_NONINVERTED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___polarity.html#ga7fa7c43245b25564414b2e191d5d8b14">TIM_ETRPOLARITY_NONINVERTED</a></td></tr>
<tr class="memitem:gaf88d719dd5535b6b58275549c4512ec7" id="r_gaf88d719dd5535b6b58275549c4512ec7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___prescaler.html#gaf88d719dd5535b6b58275549c4512ec7">TIM_CLEARINPUTPRESCALER_DIV1</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gabead5364c62645592e42545ba09ab88a">TIM_ETRPRESCALER_DIV1</a></td></tr>
<tr class="memitem:gae54b2f4ea04ef97f7c75755347edc8ba" id="r_gae54b2f4ea04ef97f7c75755347edc8ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___prescaler.html#gae54b2f4ea04ef97f7c75755347edc8ba">TIM_CLEARINPUTPRESCALER_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaf7fe49f67bdb6b33b9b41953fee75680">TIM_ETRPRESCALER_DIV2</a></td></tr>
<tr class="memitem:gae3c3dea810bb9d83b532737f01a3213d" id="r_gae3c3dea810bb9d83b532737f01a3213d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___prescaler.html#gae3c3dea810bb9d83b532737f01a3213d">TIM_CLEARINPUTPRESCALER_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaa09da30c3cd28f1fe6b6f3f599a5212c">TIM_ETRPRESCALER_DIV4</a></td></tr>
<tr class="memitem:ga34bc6cb7ee8800cc48b1ee6c536859cc" id="r_ga34bc6cb7ee8800cc48b1ee6c536859cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___clear_input___prescaler.html#ga34bc6cb7ee8800cc48b1ee6c536859cc">TIM_CLEARINPUTPRESCALER_DIV8</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#ga834e38200874cced108379b17a24d0b7">TIM_ETRPRESCALER_DIV8</a></td></tr>
<tr class="memitem:ga5d21918f173eca946748a1fbc177daa5" id="r_ga5d21918f173eca946748a1fbc177daa5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___o_s_s_r___off___state___selection__for___run__mode__state.html#ga5d21918f173eca946748a1fbc177daa5">TIM_OSSR_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf9435f36d53c6be1107e57ab6a82c16e">TIM_BDTR_OSSR</a></td></tr>
<tr class="memitem:gae11820b467ef6d74c90190c8cfce5e73" id="r_gae11820b467ef6d74c90190c8cfce5e73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___o_s_s_r___off___state___selection__for___run__mode__state.html#gae11820b467ef6d74c90190c8cfce5e73">TIM_OSSR_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gae5b5901b177cd054cd5503630892680f" id="r_gae5b5901b177cd054cd5503630892680f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___o_s_s_i___off___state___selection__for___idle__mode__state.html#gae5b5901b177cd054cd5503630892680f">TIM_OSSI_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab1cf04e70ccf3d4aba5afcf2496a411a">TIM_BDTR_OSSI</a></td></tr>
<tr class="memitem:gab1a20c65a3d24ef770f8a2a14c24130b" id="r_gab1a20c65a3d24ef770f8a2a14c24130b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___o_s_s_i___off___state___selection__for___idle__mode__state.html#gab1a20c65a3d24ef770f8a2a14c24130b">TIM_OSSI_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga304aece56a9391a4d9b1016144d98fbd" id="r_ga304aece56a9391a4d9b1016144d98fbd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___lock__level.html#ga304aece56a9391a4d9b1016144d98fbd">TIM_LOCKLEVEL_OFF</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga46dc7705788ba2ce5135c43b998ef4dd" id="r_ga46dc7705788ba2ce5135c43b998ef4dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___lock__level.html#ga46dc7705788ba2ce5135c43b998ef4dd">TIM_LOCKLEVEL_1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabbd1736c8172e7cd098bb591264b07bf">TIM_BDTR_LOCK_0</a></td></tr>
<tr class="memitem:ga03a5ed2aded43ccfe7ab12a9dd53d251" id="r_ga03a5ed2aded43ccfe7ab12a9dd53d251"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___lock__level.html#ga03a5ed2aded43ccfe7ab12a9dd53d251">TIM_LOCKLEVEL_2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga756df80ff8c34399435f52dca18e6eee">TIM_BDTR_LOCK_1</a></td></tr>
<tr class="memitem:gaa1afed375c27151608e388fdf4a57a13" id="r_gaa1afed375c27151608e388fdf4a57a13"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___lock__level.html#gaa1afed375c27151608e388fdf4a57a13">TIM_LOCKLEVEL_3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7e4215d17f0548dfcf0b15fe4d0f4651">TIM_BDTR_LOCK</a></td></tr>
<tr class="memitem:ga3f966247b03532b8d93f9bddc032d863" id="r_ga3f966247b03532b8d93f9bddc032d863"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___input__enable__disable.html#ga3f966247b03532b8d93f9bddc032d863">TIM_BREAK_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga74250b040dd9fd9c09dcc54cdd6d86d8">TIM_BDTR_BKE</a></td></tr>
<tr class="memitem:ga8b34ce60f3f08c4b0d924a6546939994" id="r_ga8b34ce60f3f08c4b0d924a6546939994"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___input__enable__disable.html#ga8b34ce60f3f08c4b0d924a6546939994">TIM_BREAK_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga3e07cb0376c1bf561341dc8befb66208" id="r_ga3e07cb0376c1bf561341dc8befb66208"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___polarity.html#ga3e07cb0376c1bf561341dc8befb66208">TIM_BREAKPOLARITY_LOW</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga97c30f1134accd61e3e42ce37e472700" id="r_ga97c30f1134accd61e3e42ce37e472700"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___polarity.html#ga97c30f1134accd61e3e42ce37e472700">TIM_BREAKPOLARITY_HIGH</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3247abbbf0d00260be051d176d88020e">TIM_BDTR_BKP</a></td></tr>
<tr class="memitem:gac57b7f2a6a7dc5258e097f9ece77265b" id="r_gac57b7f2a6a7dc5258e097f9ece77265b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break2___input__enable__disable.html#gac57b7f2a6a7dc5258e097f9ece77265b">TIM_BREAK2_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gafba1d741e2a78566f0bb15c435a63a4e" id="r_gafba1d741e2a78566f0bb15c435a63a4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break2___input__enable__disable.html#gafba1d741e2a78566f0bb15c435a63a4e">TIM_BREAK2_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga50aff10d1577a94de8c4aa46cd2cbdb5">TIM_BDTR_BK2E</a></td></tr>
<tr class="memitem:gaf7996c33cc0bcaf750550358700008b2" id="r_gaf7996c33cc0bcaf750550358700008b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break2___polarity.html#gaf7996c33cc0bcaf750550358700008b2">TIM_BREAK2POLARITY_LOW</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga36a8e307c7c6c42ebf5f5d5d2fb259d4" id="r_ga36a8e307c7c6c42ebf5f5d5d2fb259d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break2___polarity.html#ga36a8e307c7c6c42ebf5f5d5d2fb259d4">TIM_BREAK2POLARITY_HIGH</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga94911ade52aef76f5ad41613f9fc9590">TIM_BDTR_BK2P</a></td></tr>
<tr class="memitem:ga65b4336dee767fbe8d8cc4f980f6b18e" id="r_ga65b4336dee767fbe8d8cc4f980f6b18e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___a_o_e___bit___set___reset.html#ga65b4336dee767fbe8d8cc4f980f6b18e">TIM_AUTOMATICOUTPUT_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga09e7f3f768b0f122f13fd47771f07ddf" id="r_ga09e7f3f768b0f122f13fd47771f07ddf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___a_o_e___bit___set___reset.html#ga09e7f3f768b0f122f13fd47771f07ddf">TIM_AUTOMATICOUTPUT_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga59f15008050f91fa3ecc9eaaa971a509">TIM_BDTR_AOE</a></td></tr>
<tr class="memitem:gac092061c7424b2d05e4788399139a45b" id="r_gac092061c7424b2d05e4788399139a45b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group___channel5.html#gac092061c7424b2d05e4788399139a45b">TIM_GROUPCH5_NONE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga22bfca6a62255c5742471044f4b75815" id="r_ga22bfca6a62255c5742471044f4b75815"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group___channel5.html#ga22bfca6a62255c5742471044f4b75815">TIM_GROUPCH5_OC1REFC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gadce130a8f74c02de0f6e2f8cb0f16b6e">TIM_CCR5_GC5C1</a></td></tr>
<tr class="memitem:gad6d87bba35658aa23e11770bf2b6f53b" id="r_gad6d87bba35658aa23e11770bf2b6f53b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group___channel5.html#gad6d87bba35658aa23e11770bf2b6f53b">TIM_GROUPCH5_OC2REFC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga66b51c31aab6f353303cffb10593a027">TIM_CCR5_GC5C2</a></td></tr>
<tr class="memitem:gaf97b2fdd96918a9f224ce3524c77781b" id="r_gaf97b2fdd96918a9f224ce3524c77781b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group___channel5.html#gaf97b2fdd96918a9f224ce3524c77781b">TIM_GROUPCH5_OC3REFC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaaf84ef0edc60a2bb1d724fd28ae522e">TIM_CCR5_GC5C3</a></td></tr>
<tr class="memitem:ga32a8e436f2c0818a657b0d3fcf4e872d" id="r_ga32a8e436f2c0818a657b0d3fcf4e872d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#ga32a8e436f2c0818a657b0d3fcf4e872d">TIM_TRGO_RESET</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga4ac300b0fd24d1e6532e5961680a39a9" id="r_ga4ac300b0fd24d1e6532e5961680a39a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#ga4ac300b0fd24d1e6532e5961680a39a9">TIM_TRGO_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e55308e84106d6501201e66bd46ab6">TIM_CR2_MMS_0</a></td></tr>
<tr class="memitem:ga27521aebd507e562fe7fba6dfc639a67" id="r_ga27521aebd507e562fe7fba6dfc639a67"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#ga27521aebd507e562fe7fba6dfc639a67">TIM_TRGO_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4b1036929b0a4ba5bd5cced9b8e0f4c3">TIM_CR2_MMS_1</a></td></tr>
<tr class="memitem:ga80aa9a9c41de509d99fc4cb492d6513f" id="r_ga80aa9a9c41de509d99fc4cb492d6513f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#ga80aa9a9c41de509d99fc4cb492d6513f">TIM_TRGO_OC1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga4b1036929b0a4ba5bd5cced9b8e0f4c3">TIM_CR2_MMS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e55308e84106d6501201e66bd46ab6">TIM_CR2_MMS_0</a>)</td></tr>
<tr class="memitem:gaed715aa7ec4ad0f7f5d82dde6d964178" id="r_gaed715aa7ec4ad0f7f5d82dde6d964178"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#gaed715aa7ec4ad0f7f5d82dde6d964178">TIM_TRGO_OC1REF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacb74a815afdd856d51cfcf1ddf3fce6a">TIM_CR2_MMS_2</a></td></tr>
<tr class="memitem:gaaedc4b3f4c5c3c8b45a2cf1b73e33c0a" id="r_gaaedc4b3f4c5c3c8b45a2cf1b73e33c0a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#gaaedc4b3f4c5c3c8b45a2cf1b73e33c0a">TIM_TRGO_OC2REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacb74a815afdd856d51cfcf1ddf3fce6a">TIM_CR2_MMS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e55308e84106d6501201e66bd46ab6">TIM_CR2_MMS_0</a>)</td></tr>
<tr class="memitem:ga4bc4791f8b9560950d30078b96d08f55" id="r_ga4bc4791f8b9560950d30078b96d08f55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#ga4bc4791f8b9560950d30078b96d08f55">TIM_TRGO_OC3REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacb74a815afdd856d51cfcf1ddf3fce6a">TIM_CR2_MMS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga4b1036929b0a4ba5bd5cced9b8e0f4c3">TIM_CR2_MMS_1</a>)</td></tr>
<tr class="memitem:ga7fe6228adec5d1b6f0a8ed8da111db4d" id="r_ga7fe6228adec5d1b6f0a8ed8da111db4d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection.html#ga7fe6228adec5d1b6f0a8ed8da111db4d">TIM_TRGO_OC4REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacb74a815afdd856d51cfcf1ddf3fce6a">TIM_CR2_MMS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga4b1036929b0a4ba5bd5cced9b8e0f4c3">TIM_CR2_MMS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e55308e84106d6501201e66bd46ab6">TIM_CR2_MMS_0</a>)</td></tr>
<tr class="memitem:ga1cbae68386015bde2e2087787d31a77f" id="r_ga1cbae68386015bde2e2087787d31a77f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga1cbae68386015bde2e2087787d31a77f">TIM_TRGO2_RESET</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gab9344703b3c1a7936f6b500a6bc26cb9" id="r_gab9344703b3c1a7936f6b500a6bc26cb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#gab9344703b3c1a7936f6b500a6bc26cb9">TIM_TRGO2_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a></td></tr>
<tr class="memitem:ga7c09a032f333bd3c1896e53f8c476303" id="r_ga7c09a032f333bd3c1896e53f8c476303"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga7c09a032f333bd3c1896e53f8c476303">TIM_TRGO2_UPDATE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a></td></tr>
<tr class="memitem:ga6199721bcb0eb5f89dcd0b1055f7376f" id="r_ga6199721bcb0eb5f89dcd0b1055f7376f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga6199721bcb0eb5f89dcd0b1055f7376f">TIM_TRGO2_OC1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:gabe44de11cdf3f6d151b0d4a4945db092" id="r_gabe44de11cdf3f6d151b0d4a4945db092"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#gabe44de11cdf3f6d151b0d4a4945db092">TIM_TRGO2_OC1REF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a></td></tr>
<tr class="memitem:gaaa5b56f4c834853ccf048399f77fbb3b" id="r_gaaa5b56f4c834853ccf048399f77fbb3b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#gaaa5b56f4c834853ccf048399f77fbb3b">TIM_TRGO2_OC2REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:ga670369673955ede3e33074ad1897c64a" id="r_ga670369673955ede3e33074ad1897c64a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga670369673955ede3e33074ad1897c64a">TIM_TRGO2_OC3REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a>)</td></tr>
<tr class="memitem:gaa307bb2aa7beb9f0ea43247a38ca7b36" id="r_gaa307bb2aa7beb9f0ea43247a38ca7b36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#gaa307bb2aa7beb9f0ea43247a38ca7b36">TIM_TRGO2_OC4REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:ga9609da1787a7dcde257de6f96dabed4c" id="r_ga9609da1787a7dcde257de6f96dabed4c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga9609da1787a7dcde257de6f96dabed4c">TIM_TRGO2_OC5REF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a></td></tr>
<tr class="memitem:gae88c0c9c55ffb739dada0bdea37a809d" id="r_gae88c0c9c55ffb739dada0bdea37a809d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#gae88c0c9c55ffb739dada0bdea37a809d">TIM_TRGO2_OC6REF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:ga0916f567135c5ee60031da2d146ad10b" id="r_ga0916f567135c5ee60031da2d146ad10b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga0916f567135c5ee60031da2d146ad10b">TIM_TRGO2_OC4REF_RISINGFALLING</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a>)</td></tr>
<tr class="memitem:gaefa63d8189e6e6fcd592fcf4af8aa416" id="r_gaefa63d8189e6e6fcd592fcf4af8aa416"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#gaefa63d8189e6e6fcd592fcf4af8aa416">TIM_TRGO2_OC6REF_RISINGFALLING</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:ga367b1addfd2f36bb8ed29e8e70e57024" id="r_ga367b1addfd2f36bb8ed29e8e70e57024"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga367b1addfd2f36bb8ed29e8e70e57024">TIM_TRGO2_OC4REF_RISING_OC6REF_RISING</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a>)</td></tr>
<tr class="memitem:ga202fe63f92ca564cb18995a11b3946b2" id="r_ga202fe63f92ca564cb18995a11b3946b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga202fe63f92ca564cb18995a11b3946b2">TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:ga98299af57d50ec9a0dc1fbd3d4d04c39" id="r_ga98299af57d50ec9a0dc1fbd3d4d04c39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga98299af57d50ec9a0dc1fbd3d4d04c39">TIM_TRGO2_OC5REF_RISING_OC6REF_RISING</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a> |<a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a>)</td></tr>
<tr class="memitem:ga90aeea268dbf4be05e4d5f221f40da7c" id="r_ga90aeea268dbf4be05e4d5f221f40da7c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___mode___selection__2.html#ga90aeea268dbf4be05e4d5f221f40da7c">TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3503937610adbf78153c1fcfa4bcd6ea">TIM_CR2_MMS2_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaa49670c71a446e5201994716b08b1527">TIM_CR2_MMS2_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0248e35956d0d22ac66dcd67aab317c5">TIM_CR2_MMS2_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga07efe60d8d7305b78085233ddaecb990">TIM_CR2_MMS2_0</a>)</td></tr>
<tr class="memitem:gafdc0de07db4688aa8c87cf03220aaf28" id="r_gafdc0de07db4688aa8c87cf03220aaf28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___slave___mode.html#gafdc0de07db4688aa8c87cf03220aaf28">TIM_MASTERSLAVEMODE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga52101db4ca2c7b3003f1b16a49b2032c">TIM_SMCR_MSM</a></td></tr>
<tr class="memitem:ga58ff99ef1d6d6f187e3615f9d3ec3b8b" id="r_ga58ff99ef1d6d6f187e3615f9d3ec3b8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___master___slave___mode.html#ga58ff99ef1d6d6f187e3615f9d3ec3b8b">TIM_MASTERSLAVEMODE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga3b53e1a85d08f125df4371f86bdaf79b" id="r_ga3b53e1a85d08f125df4371f86bdaf79b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___slave___mode.html#ga3b53e1a85d08f125df4371f86bdaf79b">TIM_SLAVEMODE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga9f28e350c0560dc550f5c0d2f8b39ba7" id="r_ga9f28e350c0560dc550f5c0d2f8b39ba7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___slave___mode.html#ga9f28e350c0560dc550f5c0d2f8b39ba7">TIM_SLAVEMODE_RESET</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga63847fc3c71f582403e6301b1229c3ed">TIM_SMCR_SMS_2</a></td></tr>
<tr class="memitem:ga4501317fcd7649e5ff46db6fe69938e0" id="r_ga4501317fcd7649e5ff46db6fe69938e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___slave___mode.html#ga4501317fcd7649e5ff46db6fe69938e0">TIM_SLAVEMODE_GATED</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga63847fc3c71f582403e6301b1229c3ed">TIM_SMCR_SMS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga7d1ebece401aeb12abd466d2eafa78b2">TIM_SMCR_SMS_0</a>)</td></tr>
<tr class="memitem:ga12f8f7b4a16b438f54cf811f0bb0a8a4" id="r_ga12f8f7b4a16b438f54cf811f0bb0a8a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___slave___mode.html#ga12f8f7b4a16b438f54cf811f0bb0a8a4">TIM_SLAVEMODE_TRIGGER</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga63847fc3c71f582403e6301b1229c3ed">TIM_SMCR_SMS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaa980a3121ab6cda5a4a42b959da8421e">TIM_SMCR_SMS_1</a>)</td></tr>
<tr class="memitem:ga90dcf32a66dcb250b18da2ff56471328" id="r_ga90dcf32a66dcb250b18da2ff56471328"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___slave___mode.html#ga90dcf32a66dcb250b18da2ff56471328">TIM_SLAVEMODE_EXTERNAL1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga63847fc3c71f582403e6301b1229c3ed">TIM_SMCR_SMS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaa980a3121ab6cda5a4a42b959da8421e">TIM_SMCR_SMS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga7d1ebece401aeb12abd466d2eafa78b2">TIM_SMCR_SMS_0</a>)</td></tr>
<tr class="memitem:gad1d2132a7fc439038fd021fa8969e4d7" id="r_gad1d2132a7fc439038fd021fa8969e4d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___slave___mode.html#gad1d2132a7fc439038fd021fa8969e4d7">TIM_SLAVEMODE_COMBINED_RESETTRIGGER</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gadf87a33432788ed16b0582056d03bc29">TIM_SMCR_SMS_3</a></td></tr>
<tr class="memitem:gafae6b98b4b854fbfffd9a5ebc59c8f61" id="r_gafae6b98b4b854fbfffd9a5ebc59c8f61"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#gafae6b98b4b854fbfffd9a5ebc59c8f61">TIM_OCMODE_TIMING</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga111d1023e3ac6ef5544775c3863b4b12" id="r_ga111d1023e3ac6ef5544775c3863b4b12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga111d1023e3ac6ef5544775c3863b4b12">TIM_OCMODE_ACTIVE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a></td></tr>
<tr class="memitem:ga890fbb44fd16f2bce962983352d23f53" id="r_ga890fbb44fd16f2bce962983352d23f53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga890fbb44fd16f2bce962983352d23f53">TIM_OCMODE_INACTIVE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5f6ec25063483641d6dc065d96d2b5">TIM_CCMR1_OC1M_1</a></td></tr>
<tr class="memitem:ga368f80fad76018e2bf76084522e47536" id="r_ga368f80fad76018e2bf76084522e47536"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga368f80fad76018e2bf76084522e47536">TIM_OCMODE_TOGGLE</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5f6ec25063483641d6dc065d96d2b5">TIM_CCMR1_OC1M_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a>)</td></tr>
<tr class="memitem:ga766271da571888dfecd9130c3887e9c6" id="r_ga766271da571888dfecd9130c3887e9c6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga766271da571888dfecd9130c3887e9c6">TIM_OCMODE_PWM1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5f6ec25063483641d6dc065d96d2b5">TIM_CCMR1_OC1M_1</a>)</td></tr>
<tr class="memitem:ga88ce4251743c2c07e19fdd5a0a310580" id="r_ga88ce4251743c2c07e19fdd5a0a310580"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga88ce4251743c2c07e19fdd5a0a310580">TIM_OCMODE_PWM2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5f6ec25063483641d6dc065d96d2b5">TIM_CCMR1_OC1M_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a>)</td></tr>
<tr class="memitem:ga0a78cecaf884a89963e2a8e6af7e6128" id="r_ga0a78cecaf884a89963e2a8e6af7e6128"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga0a78cecaf884a89963e2a8e6af7e6128">TIM_OCMODE_FORCED_ACTIVE</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a>)</td></tr>
<tr class="memitem:ga4572f724ce30ce45557f1dc5141afb3e" id="r_ga4572f724ce30ce45557f1dc5141afb3e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga4572f724ce30ce45557f1dc5141afb3e">TIM_OCMODE_FORCED_INACTIVE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a></td></tr>
<tr class="memitem:ga53168a4498dcb4956d9f84419a20841c" id="r_ga53168a4498dcb4956d9f84419a20841c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga53168a4498dcb4956d9f84419a20841c">TIM_OCMODE_RETRIGERRABLE_OPM1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac93dfe7865726bc84363684b9fa01c93">TIM_CCMR1_OC1M_3</a></td></tr>
<tr class="memitem:ga83f39ecc55403f37e930e6f14cb6cc76" id="r_ga83f39ecc55403f37e930e6f14cb6cc76"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga83f39ecc55403f37e930e6f14cb6cc76">TIM_OCMODE_RETRIGERRABLE_OPM2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac93dfe7865726bc84363684b9fa01c93">TIM_CCMR1_OC1M_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a>)</td></tr>
<tr class="memitem:gaa13e0cb2370d61cfee1241498733b38b" id="r_gaa13e0cb2370d61cfee1241498733b38b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#gaa13e0cb2370d61cfee1241498733b38b">TIM_OCMODE_COMBINED_PWM1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac93dfe7865726bc84363684b9fa01c93">TIM_CCMR1_OC1M_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a>)</td></tr>
<tr class="memitem:gaf983419ff3d5bc0ca8d122bb8f321eff" id="r_gaf983419ff3d5bc0ca8d122bb8f321eff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#gaf983419ff3d5bc0ca8d122bb8f321eff">TIM_OCMODE_COMBINED_PWM2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac93dfe7865726bc84363684b9fa01c93">TIM_CCMR1_OC1M_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a>)</td></tr>
<tr class="memitem:gac1c1f898f74a95c15bd1cee91c636a82" id="r_gac1c1f898f74a95c15bd1cee91c636a82"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#gac1c1f898f74a95c15bd1cee91c636a82">TIM_OCMODE_ASYMMETRIC_PWM1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac93dfe7865726bc84363684b9fa01c93">TIM_CCMR1_OC1M_3</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5f6ec25063483641d6dc065d96d2b5">TIM_CCMR1_OC1M_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a>)</td></tr>
<tr class="memitem:ga475c44a172e981d0d96e51dd811d2705" id="r_ga475c44a172e981d0d96e51dd811d2705"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html#ga475c44a172e981d0d96e51dd811d2705">TIM_OCMODE_ASYMMETRIC_PWM2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6ddb3dc889733e71d812baa3873cb13b">TIM_CCMR1_OC1M</a></td></tr>
<tr class="memitem:gab7cf2b7db3956d4fd1e5a5d84f4891e7" id="r_gab7cf2b7db3956d4fd1e5a5d84f4891e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gab7cf2b7db3956d4fd1e5a5d84f4891e7">TIM_TS_ITR0</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gad90fbca297153ca9c0112a67ea2c6cb3" id="r_gad90fbca297153ca9c0112a67ea2c6cb3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gad90fbca297153ca9c0112a67ea2c6cb3">TIM_TS_ITR1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a></td></tr>
<tr class="memitem:ga8599ba58a5f911d648503c7ac55d4320" id="r_ga8599ba58a5f911d648503c7ac55d4320"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga8599ba58a5f911d648503c7ac55d4320">TIM_TS_ITR2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a></td></tr>
<tr class="memitem:ga63183e611b91c5847040172c0069514d" id="r_ga63183e611b91c5847040172c0069514d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga63183e611b91c5847040172c0069514d">TIM_TS_ITR3</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a>)</td></tr>
<tr class="memitem:ga97923e4805e15f379eafe4fa5f09fb44" id="r_ga97923e4805e15f379eafe4fa5f09fb44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga97923e4805e15f379eafe4fa5f09fb44">TIM_TS_ITR4</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:gad0fea6ddb2a6c782a12cb7db0ce17df8" id="r_gad0fea6ddb2a6c782a12cb7db0ce17df8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gad0fea6ddb2a6c782a12cb7db0ce17df8">TIM_TS_ITR5</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:ga539cd36541e24f7009713a4c48b036f0" id="r_ga539cd36541e24f7009713a4c48b036f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga539cd36541e24f7009713a4c48b036f0">TIM_TS_ITR6</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:ga5f454db2459d03ac796190f09fa75bbc" id="r_ga5f454db2459d03ac796190f09fa75bbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga5f454db2459d03ac796190f09fa75bbc">TIM_TS_ITR7</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:gab84e0eb124670693149c7f1b775fb87b" id="r_gab84e0eb124670693149c7f1b775fb87b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gab84e0eb124670693149c7f1b775fb87b">TIM_TS_ITR8</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:ga8ed963d761840dfed585f147d2cbb976" id="r_ga8ed963d761840dfed585f147d2cbb976"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga8ed963d761840dfed585f147d2cbb976">TIM_TS_ITR9</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:gabfe43c9fd555ce5e726c5a879b965ecc" id="r_gabfe43c9fd555ce5e726c5a879b965ecc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gabfe43c9fd555ce5e726c5a879b965ecc">TIM_TS_ITR10</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:gac97a5396aa30a45df480ccd8562ae470" id="r_gac97a5396aa30a45df480ccd8562ae470"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gac97a5396aa30a45df480ccd8562ae470">TIM_TS_ITR11</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6abf2e23327e612d1363e664bf1e1221">TIM_SMCR_TS_3</a>)</td></tr>
<tr class="memitem:ga09c956f6d06ec782aff181ac65031d70" id="r_ga09c956f6d06ec782aff181ac65031d70"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga09c956f6d06ec782aff181ac65031d70">TIM_TS_ITR12</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaccf33c88c2d65cf2bcf20dbf80f4ea60">TIM_SMCR_TS_4</a>)</td></tr>
<tr class="memitem:gac0a650df237ecf620a6b0b3d478c2186" id="r_gac0a650df237ecf620a6b0b3d478c2186"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gac0a650df237ecf620a6b0b3d478c2186">TIM_TS_ITR13</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaccf33c88c2d65cf2bcf20dbf80f4ea60">TIM_SMCR_TS_4</a>)</td></tr>
<tr class="memitem:ga8c89554efc693e679c94b5a749af123c" id="r_ga8c89554efc693e679c94b5a749af123c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga8c89554efc693e679c94b5a749af123c">TIM_TS_TI1F_ED</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a></td></tr>
<tr class="memitem:ga38d3514d54bcdb0ea8ac8bd91c5832b5" id="r_ga38d3514d54bcdb0ea8ac8bd91c5832b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga38d3514d54bcdb0ea8ac8bd91c5832b5">TIM_TS_TI1FP1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a>)</td></tr>
<tr class="memitem:ga0ed58a269bccd3f22d19cc9a2ba3123f" id="r_ga0ed58a269bccd3f22d19cc9a2ba3123f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga0ed58a269bccd3f22d19cc9a2ba3123f">TIM_TS_TI2FP2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a>)</td></tr>
<tr class="memitem:gaece08e02e056613a882aa7ff0a6ccc2d" id="r_gaece08e02e056613a882aa7ff0a6ccc2d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#gaece08e02e056613a882aa7ff0a6ccc2d">TIM_TS_ETRF</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a>)</td></tr>
<tr class="memitem:ga257bee9dc9f2f71a73124dd8c2329480" id="r_ga257bee9dc9f2f71a73124dd8c2329480"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___selection.html#ga257bee9dc9f2f71a73124dd8c2329480">TIM_TS_NONE</a>&#160;&#160;&#160;0x0000FFFFU</td></tr>
<tr class="memitem:ga64337379c3762dca395b812c65656de4" id="r_ga64337379c3762dca395b812c65656de4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___polarity.html#ga64337379c3762dca395b812c65656de4">TIM_TRIGGERPOLARITY_INVERTED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___polarity.html#ga42652ff688f0042659f8304ae08abfa6">TIM_ETRPOLARITY_INVERTED</a></td></tr>
<tr class="memitem:gad985881cdfddb63dfc52e6aaca776ff6" id="r_gad985881cdfddb63dfc52e6aaca776ff6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___polarity.html#gad985881cdfddb63dfc52e6aaca776ff6">TIM_TRIGGERPOLARITY_NONINVERTED</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___polarity.html#ga7fa7c43245b25564414b2e191d5d8b14">TIM_ETRPOLARITY_NONINVERTED</a></td></tr>
<tr class="memitem:ga64b521aa367d745ec00a763449634ace" id="r_ga64b521aa367d745ec00a763449634ace"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___polarity.html#ga64b521aa367d745ec00a763449634ace">TIM_TRIGGERPOLARITY_RISING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga4f4cede88a4ad4b33e81f2567e9bb08f">TIM_INPUTCHANNELPOLARITY_RISING</a></td></tr>
<tr class="memitem:ga77df5988527ca829743dd57d2f867972" id="r_ga77df5988527ca829743dd57d2f867972"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___polarity.html#ga77df5988527ca829743dd57d2f867972">TIM_TRIGGERPOLARITY_FALLING</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#ga07441a8c0a52234e30f471c23803450c">TIM_INPUTCHANNELPOLARITY_FALLING</a></td></tr>
<tr class="memitem:gaa72eb9fd278575ff05aa3dd1c173dcc8" id="r_gaa72eb9fd278575ff05aa3dd1c173dcc8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___polarity.html#gaa72eb9fd278575ff05aa3dd1c173dcc8">TIM_TRIGGERPOLARITY_BOTHEDGE</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___input___channel___polarity.html#gaab2598881d1f19158e77723c5d29d6ac">TIM_INPUTCHANNELPOLARITY_BOTHEDGE</a></td></tr>
<tr class="memitem:ga02ab6f24e367cd972a1e0c1df326a7a3" id="r_ga02ab6f24e367cd972a1e0c1df326a7a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___prescaler.html#ga02ab6f24e367cd972a1e0c1df326a7a3">TIM_TRIGGERPRESCALER_DIV1</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gabead5364c62645592e42545ba09ab88a">TIM_ETRPRESCALER_DIV1</a></td></tr>
<tr class="memitem:ga1350c5659a17a66df69b444871907d83" id="r_ga1350c5659a17a66df69b444871907d83"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___prescaler.html#ga1350c5659a17a66df69b444871907d83">TIM_TRIGGERPRESCALER_DIV2</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaf7fe49f67bdb6b33b9b41953fee75680">TIM_ETRPRESCALER_DIV2</a></td></tr>
<tr class="memitem:ga195dd56e15ea4733e19518fb431dfb8d" id="r_ga195dd56e15ea4733e19518fb431dfb8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___prescaler.html#ga195dd56e15ea4733e19518fb431dfb8d">TIM_TRIGGERPRESCALER_DIV4</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#gaa09da30c3cd28f1fe6b6f3f599a5212c">TIM_ETRPRESCALER_DIV4</a></td></tr>
<tr class="memitem:ga78edbcf4caf228de0daa4b7f698f578f" id="r_ga78edbcf4caf228de0daa4b7f698f578f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___trigger___prescaler.html#ga78edbcf4caf228de0daa4b7f698f578f">TIM_TRIGGERPRESCALER_DIV8</a>&#160;&#160;&#160;<a class="el" href="group___t_i_m___e_t_r___prescaler.html#ga834e38200874cced108379b17a24d0b7">TIM_ETRPRESCALER_DIV8</a></td></tr>
<tr class="memitem:gace6563bccf7635461f660fbed6241488" id="r_gace6563bccf7635461f660fbed6241488"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___t_i1___selection.html#gace6563bccf7635461f660fbed6241488">TIM_TI1SELECTION_CH1</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga40dfcb0e3f2fdf0f45cbba227106310a" id="r_ga40dfcb0e3f2fdf0f45cbba227106310a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___t_i1___selection.html#ga40dfcb0e3f2fdf0f45cbba227106310a">TIM_TI1SELECTION_XORCOMBINATION</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad07504497b70af628fa1aee8fe7ef63c">TIM_CR2_TI1S</a></td></tr>
<tr class="memitem:ga74f07b4a10022d71f31ec6e1b2b69276" id="r_ga74f07b4a10022d71f31ec6e1b2b69276"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga74f07b4a10022d71f31ec6e1b2b69276">TIM_DMABURSTLENGTH_1TRANSFER</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gab114592091a00e0a6b9ae464485bd7bb" id="r_gab114592091a00e0a6b9ae464485bd7bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gab114592091a00e0a6b9ae464485bd7bb">TIM_DMABURSTLENGTH_2TRANSFERS</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memitem:gad91c14f0930803593ecdbd98002fea0a" id="r_gad91c14f0930803593ecdbd98002fea0a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gad91c14f0930803593ecdbd98002fea0a">TIM_DMABURSTLENGTH_3TRANSFERS</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memitem:ga9ada9605ae6ff6e4ada9701263bef812" id="r_ga9ada9605ae6ff6e4ada9701263bef812"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga9ada9605ae6ff6e4ada9701263bef812">TIM_DMABURSTLENGTH_4TRANSFERS</a>&#160;&#160;&#160;0x00000300U</td></tr>
<tr class="memitem:ga740a6446c0a517cc3e235fddee45fef5" id="r_ga740a6446c0a517cc3e235fddee45fef5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga740a6446c0a517cc3e235fddee45fef5">TIM_DMABURSTLENGTH_5TRANSFERS</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memitem:ga905c206d2a028e3fb92bcab8f9f7c869" id="r_ga905c206d2a028e3fb92bcab8f9f7c869"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga905c206d2a028e3fb92bcab8f9f7c869">TIM_DMABURSTLENGTH_6TRANSFERS</a>&#160;&#160;&#160;0x00000500U</td></tr>
<tr class="memitem:gae75055ac13b73baf9326f1d6157853a7" id="r_gae75055ac13b73baf9326f1d6157853a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gae75055ac13b73baf9326f1d6157853a7">TIM_DMABURSTLENGTH_7TRANSFERS</a>&#160;&#160;&#160;0x00000600U</td></tr>
<tr class="memitem:gac6b24f5b7d9e1968b4bfcaeb24e718fc" id="r_gac6b24f5b7d9e1968b4bfcaeb24e718fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gac6b24f5b7d9e1968b4bfcaeb24e718fc">TIM_DMABURSTLENGTH_8TRANSFERS</a>&#160;&#160;&#160;0x00000700U</td></tr>
<tr class="memitem:ga73fff75a3f0247c61a84a42e8cb83572" id="r_ga73fff75a3f0247c61a84a42e8cb83572"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga73fff75a3f0247c61a84a42e8cb83572">TIM_DMABURSTLENGTH_9TRANSFERS</a>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="memitem:ga793a89bb8a0669e274de451985186c53" id="r_ga793a89bb8a0669e274de451985186c53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga793a89bb8a0669e274de451985186c53">TIM_DMABURSTLENGTH_10TRANSFERS</a>&#160;&#160;&#160;0x00000900U</td></tr>
<tr class="memitem:ga79ab58b6a3b30c54c0758b381df22cb0" id="r_ga79ab58b6a3b30c54c0758b381df22cb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga79ab58b6a3b30c54c0758b381df22cb0">TIM_DMABURSTLENGTH_11TRANSFERS</a>&#160;&#160;&#160;0x00000A00U</td></tr>
<tr class="memitem:gaf52962b501b3a76d89df6274ed425947" id="r_gaf52962b501b3a76d89df6274ed425947"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gaf52962b501b3a76d89df6274ed425947">TIM_DMABURSTLENGTH_12TRANSFERS</a>&#160;&#160;&#160;0x00000B00U</td></tr>
<tr class="memitem:ga06a81eba628bea6495d86ebcc6021da0" id="r_ga06a81eba628bea6495d86ebcc6021da0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga06a81eba628bea6495d86ebcc6021da0">TIM_DMABURSTLENGTH_13TRANSFERS</a>&#160;&#160;&#160;0x00000C00U</td></tr>
<tr class="memitem:ga5f430b76c0aeded0a8d8be779f26ae52" id="r_ga5f430b76c0aeded0a8d8be779f26ae52"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga5f430b76c0aeded0a8d8be779f26ae52">TIM_DMABURSTLENGTH_14TRANSFERS</a>&#160;&#160;&#160;0x00000D00U</td></tr>
<tr class="memitem:ga98a4d88c533178bc1b4347e4c5ce815a" id="r_ga98a4d88c533178bc1b4347e4c5ce815a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#ga98a4d88c533178bc1b4347e4c5ce815a">TIM_DMABURSTLENGTH_15TRANSFERS</a>&#160;&#160;&#160;0x00000E00U</td></tr>
<tr class="memitem:gaf4b2a1fe12c52272544c21e17de1ed90" id="r_gaf4b2a1fe12c52272544c21e17de1ed90"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gaf4b2a1fe12c52272544c21e17de1ed90">TIM_DMABURSTLENGTH_16TRANSFERS</a>&#160;&#160;&#160;0x00000F00U</td></tr>
<tr class="memitem:gad31c1fca7ed436a53efc4f290144584d" id="r_gad31c1fca7ed436a53efc4f290144584d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gad31c1fca7ed436a53efc4f290144584d">TIM_DMABURSTLENGTH_17TRANSFERS</a>&#160;&#160;&#160;0x00001000U</td></tr>
<tr class="memitem:gabb6f72b02ee1c8855de241cb0713e2ca" id="r_gabb6f72b02ee1c8855de241cb0713e2ca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___d_m_a___burst___length.html#gabb6f72b02ee1c8855de241cb0713e2ca">TIM_DMABURSTLENGTH_18TRANSFERS</a>&#160;&#160;&#160;0x00001100U</td></tr>
<tr class="memitem:ga15f38cee11f8b2b5a85cbf4552ba140d" id="r_ga15f38cee11f8b2b5a85cbf4552ba140d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#ga15f38cee11f8b2b5a85cbf4552ba140d">TIM_DMA_ID_UPDATE</a>&#160;&#160;&#160;((uint16_t) 0x0000)</td></tr>
<tr class="memitem:ga7ca691eb5e29b0206d3390cc6e90079a" id="r_ga7ca691eb5e29b0206d3390cc6e90079a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#ga7ca691eb5e29b0206d3390cc6e90079a">TIM_DMA_ID_CC1</a>&#160;&#160;&#160;((uint16_t) 0x0001)</td></tr>
<tr class="memitem:ga9c52f32d4bd21dd2d232900219f0a111" id="r_ga9c52f32d4bd21dd2d232900219f0a111"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#ga9c52f32d4bd21dd2d232900219f0a111">TIM_DMA_ID_CC2</a>&#160;&#160;&#160;((uint16_t) 0x0002)</td></tr>
<tr class="memitem:ga6e8145f305b54744bf2ef379a4315a40" id="r_ga6e8145f305b54744bf2ef379a4315a40"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#ga6e8145f305b54744bf2ef379a4315a40">TIM_DMA_ID_CC3</a>&#160;&#160;&#160;((uint16_t) 0x0003)</td></tr>
<tr class="memitem:ga1860c00b370435ff40d9e65f14a61706" id="r_ga1860c00b370435ff40d9e65f14a61706"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#ga1860c00b370435ff40d9e65f14a61706">TIM_DMA_ID_CC4</a>&#160;&#160;&#160;((uint16_t) 0x0004)</td></tr>
<tr class="memitem:gaa707c98bb11277665635ca7aef1e4193" id="r_gaa707c98bb11277665635ca7aef1e4193"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#gaa707c98bb11277665635ca7aef1e4193">TIM_DMA_ID_COMMUTATION</a>&#160;&#160;&#160;((uint16_t) 0x0005)</td></tr>
<tr class="memitem:ga39900e5227e4d813a726a1df5d86671c" id="r_ga39900e5227e4d813a726a1df5d86671c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a___handle__index.html#ga39900e5227e4d813a726a1df5d86671c">TIM_DMA_ID_TRIGGER</a>&#160;&#160;&#160;((uint16_t) 0x0006)</td></tr>
<tr class="memitem:ga7b214df0d5c67138de7bc84e937909f0" id="r_ga7b214df0d5c67138de7bc84e937909f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___channel___c_c___state.html#ga7b214df0d5c67138de7bc84e937909f0">TIM_CCx_ENABLE</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memitem:ga5068d16e01778cd3bd09555013b2f4d3" id="r_ga5068d16e01778cd3bd09555013b2f4d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___channel___c_c___state.html#ga5068d16e01778cd3bd09555013b2f4d3">TIM_CCx_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga69ecb0bf5dcd5ecf30af36d6fc00ea0d" id="r_ga69ecb0bf5dcd5ecf30af36d6fc00ea0d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___channel___c_c___state.html#ga69ecb0bf5dcd5ecf30af36d6fc00ea0d">TIM_CCxN_ENABLE</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memitem:ga241183326d83407f7cc7dbd292533240" id="r_ga241183326d83407f7cc7dbd292533240"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___channel___c_c___state.html#ga241183326d83407f7cc7dbd292533240">TIM_CCxN_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga353dd579e2ee67ce514f2bc218f64279" id="r_ga353dd579e2ee67ce514f2bc218f64279"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___system.html#ga353dd579e2ee67ce514f2bc218f64279">TIM_BREAK_SYSTEM_ECC</a>&#160;&#160;&#160;SYSCFG_CFGR2_ECCL</td></tr>
<tr class="memitem:ga389af93f9a1789e7de509991ef23cfec" id="r_ga389af93f9a1789e7de509991ef23cfec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___system.html#ga389af93f9a1789e7de509991ef23cfec">TIM_BREAK_SYSTEM_PVD</a>&#160;&#160;&#160;SYSCFG_CFGR2_PVDL</td></tr>
<tr class="memitem:gaf359a8c2dde8fda9cb026926b8402dee" id="r_gaf359a8c2dde8fda9cb026926b8402dee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___system.html#gaf359a8c2dde8fda9cb026926b8402dee">TIM_BREAK_SYSTEM_SRAM_PARITY_ERROR</a>&#160;&#160;&#160;SYSCFG_CFGR2_SPL</td></tr>
<tr class="memitem:ga9b84149e41633c45c50c5cdcbbd63dc0" id="r_ga9b84149e41633c45c50c5cdcbbd63dc0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___break___system.html#ga9b84149e41633c45c50c5cdcbbd63dc0">TIM_BREAK_SYSTEM_LOCKUP</a>&#160;&#160;&#160;SYSCFG_CFGR2_CLL</td></tr>
<tr class="memitem:gace20fd4e38231b9682fbc83a80ec19a3" id="r_gace20fd4e38231b9682fbc83a80ec19a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gace20fd4e38231b9682fbc83a80ec19a3">__HAL_TIM_RESET_HANDLE_STATE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gace20fd4e38231b9682fbc83a80ec19a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset TIM handle state.  <br /></td></tr>
<tr class="memitem:ga1a90544705059e9f19f991651623b0c0" id="r_ga1a90544705059e9f19f991651623b0c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga1a90544705059e9f19f991651623b0c0">__HAL_TIM_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga1a90544705059e9f19f991651623b0c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the TIM peripheral.  <br /></td></tr>
<tr class="memitem:ga04890dcef3ed061854721a3672585607" id="r_ga04890dcef3ed061854721a3672585607"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga04890dcef3ed061854721a3672585607">__HAL_TIM_MOE_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga04890dcef3ed061854721a3672585607"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the TIM main Output.  <br /></td></tr>
<tr class="memitem:ga6a5e653e0e06a04151b74eb1a5f96eb6" id="r_ga6a5e653e0e06a04151b74eb1a5f96eb6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga6a5e653e0e06a04151b74eb1a5f96eb6">__HAL_TIM_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga6a5e653e0e06a04151b74eb1a5f96eb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the TIM peripheral.  <br /></td></tr>
<tr class="memitem:ga69d63e147faeca8909e9679f684c0325" id="r_ga69d63e147faeca8909e9679f684c0325"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga69d63e147faeca8909e9679f684c0325">__HAL_TIM_MOE_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga69d63e147faeca8909e9679f684c0325"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the TIM main Output.  <br /></td></tr>
<tr class="memitem:gaa5c4053e8e57dc234efecbb698287b55" id="r_gaa5c4053e8e57dc234efecbb698287b55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gaa5c4053e8e57dc234efecbb698287b55">__HAL_TIM_MOE_DISABLE_UNCONDITIONALLY</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gaa5c4053e8e57dc234efecbb698287b55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the TIM main Output.  <br /></td></tr>
<tr class="memitem:ga4d69943bc4716743c78e3194e259097e" id="r_ga4d69943bc4716743c78e3194e259097e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga4d69943bc4716743c78e3194e259097e">__HAL_TIM_ENABLE_IT</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:ga4d69943bc4716743c78e3194e259097e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the specified TIM interrupt.  <br /></td></tr>
<tr class="memitem:ga31d67e905bc62e3142179dc4bbf8ba64" id="r_ga31d67e905bc62e3142179dc4bbf8ba64"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga31d67e905bc62e3142179dc4bbf8ba64">__HAL_TIM_DISABLE_IT</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:ga31d67e905bc62e3142179dc4bbf8ba64"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the specified TIM interrupt.  <br /></td></tr>
<tr class="memitem:gabb91ccd46cd7204c87170a1ea5b38135" id="r_gabb91ccd46cd7204c87170a1ea5b38135"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gabb91ccd46cd7204c87170a1ea5b38135">__HAL_TIM_ENABLE_DMA</a>(__HANDLE__,  __DMA__)</td></tr>
<tr class="memdesc:gabb91ccd46cd7204c87170a1ea5b38135"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the specified DMA request.  <br /></td></tr>
<tr class="memitem:ga1a6e8b19efd23fd0295802d904c4702f" id="r_ga1a6e8b19efd23fd0295802d904c4702f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga1a6e8b19efd23fd0295802d904c4702f">__HAL_TIM_DISABLE_DMA</a>(__HANDLE__,  __DMA__)</td></tr>
<tr class="memdesc:ga1a6e8b19efd23fd0295802d904c4702f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the specified DMA request.  <br /></td></tr>
<tr class="memitem:ga96d98c66ad9d85f00c148de99888ef19" id="r_ga96d98c66ad9d85f00c148de99888ef19"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga96d98c66ad9d85f00c148de99888ef19">__HAL_TIM_GET_FLAG</a>(__HANDLE__,  __FLAG__)</td></tr>
<tr class="memdesc:ga96d98c66ad9d85f00c148de99888ef19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified TIM interrupt flag is set or not.  <br /></td></tr>
<tr class="memitem:ga2fe74db6b8cb4badd04ed48e0f5ac7b4" id="r_ga2fe74db6b8cb4badd04ed48e0f5ac7b4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga2fe74db6b8cb4badd04ed48e0f5ac7b4">__HAL_TIM_CLEAR_FLAG</a>(__HANDLE__,  __FLAG__)</td></tr>
<tr class="memdesc:ga2fe74db6b8cb4badd04ed48e0f5ac7b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the specified TIM interrupt flag.  <br /></td></tr>
<tr class="memitem:ga644babf93470a6eee6bce8906c4da5c5" id="r_ga644babf93470a6eee6bce8906c4da5c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga644babf93470a6eee6bce8906c4da5c5">__HAL_TIM_GET_IT_SOURCE</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:ga644babf93470a6eee6bce8906c4da5c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified TIM interrupt source is enabled or not.  <br /></td></tr>
<tr class="memitem:gaea68155ce77e591e0c2582def061d6f0" id="r_gaea68155ce77e591e0c2582def061d6f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gaea68155ce77e591e0c2582def061d6f0">__HAL_TIM_CLEAR_IT</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:gaea68155ce77e591e0c2582def061d6f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the TIM interrupt pending bits.  <br /></td></tr>
<tr class="memitem:ga70b3690dfed282ade70d503801b8bfd0" id="r_ga70b3690dfed282ade70d503801b8bfd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga70b3690dfed282ade70d503801b8bfd0">__HAL_TIM_UIFREMAP_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memitem:ga3ad980b67f6a9d43e97cd71603421ad8" id="r_ga3ad980b67f6a9d43e97cd71603421ad8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga3ad980b67f6a9d43e97cd71603421ad8">__HAL_TIM_UIFREMAP_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memitem:ga12126f9a7655afcd862fc2e82686e9b9" id="r_ga12126f9a7655afcd862fc2e82686e9b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga12126f9a7655afcd862fc2e82686e9b9">__HAL_TIM_GET_UIFCPY</a>(__COUNTER__)</td></tr>
<tr class="memitem:gac73f5e7669d92971830481e7298e98ba" id="r_gac73f5e7669d92971830481e7298e98ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gac73f5e7669d92971830481e7298e98ba">__HAL_TIM_IS_TIM_COUNTING_DOWN</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gac73f5e7669d92971830481e7298e98ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates whether or not the TIM Counter is used as downcounter.  <br /></td></tr>
<tr class="memitem:gafdc5a06eab07e0c24e729fd492bdb27c" id="r_gafdc5a06eab07e0c24e729fd492bdb27c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gafdc5a06eab07e0c24e729fd492bdb27c">__HAL_TIM_SET_PRESCALER</a>(__HANDLE__,  __PRESC__)</td></tr>
<tr class="memdesc:gafdc5a06eab07e0c24e729fd492bdb27c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Prescaler on runtime.  <br /></td></tr>
<tr class="memitem:ga9746ac75e4cd25cec1a9ebac8cb82b97" id="r_ga9746ac75e4cd25cec1a9ebac8cb82b97"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga9746ac75e4cd25cec1a9ebac8cb82b97">__HAL_TIM_SET_COUNTER</a>(__HANDLE__,  __COUNTER__)</td></tr>
<tr class="memdesc:ga9746ac75e4cd25cec1a9ebac8cb82b97"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Counter Register value on runtime. Note Please check if the bit 31 of CNT register is used as UIF copy or not, this may affect the counter range in case of 32 bits counter TIM instance. Bit 31 of CNT can be enabled/disabled using <a class="el" href="group___t_i_m___exported___macros.html#ga70b3690dfed282ade70d503801b8bfd0">__HAL_TIM_UIFREMAP_ENABLE()</a>/__HAL_TIM_UIFREMAP_DISABLE() macros.  <br /></td></tr>
<tr class="memitem:gaf1af08014b9d06efbbb091d58d47c8ba" id="r_gaf1af08014b9d06efbbb091d58d47c8ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gaf1af08014b9d06efbbb091d58d47c8ba">__HAL_TIM_GET_COUNTER</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gaf1af08014b9d06efbbb091d58d47c8ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the TIM Counter Register value on runtime.  <br /></td></tr>
<tr class="memitem:ga1e6300cab1e34ecaaf490dc7d4812d69" id="r_ga1e6300cab1e34ecaaf490dc7d4812d69"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga1e6300cab1e34ecaaf490dc7d4812d69">__HAL_TIM_SET_AUTORELOAD</a>(__HANDLE__,  __AUTORELOAD__)</td></tr>
<tr class="memdesc:ga1e6300cab1e34ecaaf490dc7d4812d69"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Autoreload Register value on runtime without calling another time any Init function.  <br /></td></tr>
<tr class="memitem:gaa7a5c7645695bad15bacd402513a028a" id="r_gaa7a5c7645695bad15bacd402513a028a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gaa7a5c7645695bad15bacd402513a028a">__HAL_TIM_GET_AUTORELOAD</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gaa7a5c7645695bad15bacd402513a028a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the TIM Autoreload Register value on runtime.  <br /></td></tr>
<tr class="memitem:ga8aa84d77c670890408092630f9b2bdc4" id="r_ga8aa84d77c670890408092630f9b2bdc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga8aa84d77c670890408092630f9b2bdc4">__HAL_TIM_SET_CLOCKDIVISION</a>(__HANDLE__,  __CKD__)</td></tr>
<tr class="memdesc:ga8aa84d77c670890408092630f9b2bdc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Clock Division value on runtime without calling another time any Init function.  <br /></td></tr>
<tr class="memitem:gae6bc91bb5940bce52828c690f24001b8" id="r_gae6bc91bb5940bce52828c690f24001b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gae6bc91bb5940bce52828c690f24001b8">__HAL_TIM_GET_CLOCKDIVISION</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gae6bc91bb5940bce52828c690f24001b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the TIM Clock Division value on runtime.  <br /></td></tr>
<tr class="memitem:gaeb106399b95ef02cec502f58276a0e92" id="r_gaeb106399b95ef02cec502f58276a0e92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gaeb106399b95ef02cec502f58276a0e92">__HAL_TIM_SET_ICPRESCALER</a>(__HANDLE__,  __CHANNEL__,  __ICPSC__)</td></tr>
<tr class="memdesc:gaeb106399b95ef02cec502f58276a0e92"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function.  <br /></td></tr>
<tr class="memitem:gabfeec6b3c67a5747c7dbd20aff61d8e2" id="r_gabfeec6b3c67a5747c7dbd20aff61d8e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gabfeec6b3c67a5747c7dbd20aff61d8e2">__HAL_TIM_GET_ICPRESCALER</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memdesc:gabfeec6b3c67a5747c7dbd20aff61d8e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the TIM Input Capture prescaler on runtime.  <br /></td></tr>
<tr class="memitem:ga300d0c9624c3b072d3afeb7cef639b66" id="r_ga300d0c9624c3b072d3afeb7cef639b66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga300d0c9624c3b072d3afeb7cef639b66">__HAL_TIM_SET_COMPARE</a>(__HANDLE__,  __CHANNEL__,  __COMPARE__)</td></tr>
<tr class="memdesc:ga300d0c9624c3b072d3afeb7cef639b66"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function.  <br /></td></tr>
<tr class="memitem:gaa40722f56910966e1da5241b610eed84" id="r_gaa40722f56910966e1da5241b610eed84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gaa40722f56910966e1da5241b610eed84">__HAL_TIM_GET_COMPARE</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memdesc:gaa40722f56910966e1da5241b610eed84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the TIM Capture Compare Register value on runtime.  <br /></td></tr>
<tr class="memitem:ga199e848f0a301987a500faea0db2dd70" id="r_ga199e848f0a301987a500faea0db2dd70"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga199e848f0a301987a500faea0db2dd70">__HAL_TIM_ENABLE_OCxPRELOAD</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memdesc:ga199e848f0a301987a500faea0db2dd70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Output compare preload.  <br /></td></tr>
<tr class="memitem:ga3e0ec4eb797b54c408a3be067f41a2f8" id="r_ga3e0ec4eb797b54c408a3be067f41a2f8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga3e0ec4eb797b54c408a3be067f41a2f8">__HAL_TIM_DISABLE_OCxPRELOAD</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memdesc:ga3e0ec4eb797b54c408a3be067f41a2f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the TIM Output compare preload.  <br /></td></tr>
<tr class="memitem:ga390795eb198214e5d4ed235ae3f751e4" id="r_ga390795eb198214e5d4ed235ae3f751e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga390795eb198214e5d4ed235ae3f751e4">__HAL_TIM_ENABLE_OCxFAST</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memdesc:ga390795eb198214e5d4ed235ae3f751e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable fast mode for a given channel.  <br /></td></tr>
<tr class="memitem:gab9f8dc78886759192b5f044c7b9b0aa7" id="r_gab9f8dc78886759192b5f044c7b9b0aa7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gab9f8dc78886759192b5f044c7b9b0aa7">__HAL_TIM_DISABLE_OCxFAST</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memdesc:gab9f8dc78886759192b5f044c7b9b0aa7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable fast mode for a given channel.  <br /></td></tr>
<tr class="memitem:ga3b06856bd6d7e10cfff342b1726db51d" id="r_ga3b06856bd6d7e10cfff342b1726db51d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#ga3b06856bd6d7e10cfff342b1726db51d">__HAL_TIM_URS_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga3b06856bd6d7e10cfff342b1726db51d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Update Request Source (URS) bit of the TIMx_CR1 register.  <br /></td></tr>
<tr class="memitem:gafacb551a4c537e62a0fe740b2f12236c" id="r_gafacb551a4c537e62a0fe740b2f12236c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gafacb551a4c537e62a0fe740b2f12236c">__HAL_TIM_URS_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gafacb551a4c537e62a0fe740b2f12236c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the Update Request Source (URS) bit of the TIMx_CR1 register.  <br /></td></tr>
<tr class="memitem:gac5d6989516caa67fae23a9329228cdc7" id="r_gac5d6989516caa67fae23a9329228cdc7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gac5d6989516caa67fae23a9329228cdc7">__HAL_TIM_SET_CAPTUREPOLARITY</a>(__HANDLE__,  __CHANNEL__,  __POLARITY__)</td></tr>
<tr class="memdesc:gac5d6989516caa67fae23a9329228cdc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the TIM Capture x input polarity on runtime.  <br /></td></tr>
<tr class="memitem:gace8f6dae3653111344f4ff6bbfde7d2a" id="r_gace8f6dae3653111344f4ff6bbfde7d2a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___macros.html#gace8f6dae3653111344f4ff6bbfde7d2a">__HAL_TIM_SELECT_CCDMAREQUEST</a>(__HANDLE__,  __CCDMA__)</td></tr>
<tr class="memdesc:gace8f6dae3653111344f4ff6bbfde7d2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select the Capture/compare DMA request source.  <br /></td></tr>
<tr class="memitem:ga5d1a1d755cda12637dfa5143130b4891" id="r_ga5d1a1d755cda12637dfa5143130b4891"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_CCER_CCxE_MASK</b>&#160;&#160;&#160;((uint32_t)(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3f494b9881e7b97bb2d79f7ad4e79937">TIM_CCER_CC1E</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga76392a4d63674cd0db0a55762458f16c">TIM_CCER_CC2E</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga1da114e666b61f09cf25f50cdaa7f81f">TIM_CCER_CC3E</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga940b041ab5975311f42f26d314a4b621">TIM_CCER_CC4E</a>))</td></tr>
<tr class="memitem:gaeae61652a005098f9fe6b398d29d4279" id="r_gaeae61652a005098f9fe6b398d29d4279"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_CCER_CCxNE_MASK</b>&#160;&#160;&#160;((uint32_t)(<a class="el" href="group___peripheral___registers___bits___definition.html#ga813056b3f90a13c4432aeba55f28957e">TIM_CCER_CC1NE</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga6a784649120eddec31998f34323d4156">TIM_CCER_CC2NE</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad46cce61d3bd83b64257ba75e54ee1aa">TIM_CCER_CC3NE</a>))</td></tr>
<tr class="memitem:ga2bfb55166b01cec552638c1af05a5c54" id="r_ga2bfb55166b01cec552638c1af05a5c54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga2bfb55166b01cec552638c1af05a5c54">IS_TIM_CLEARINPUT_SOURCE</a>(__MODE__)</td></tr>
<tr class="memitem:gaf79d218bcde86838a6371534dad4acdd" id="r_gaf79d218bcde86838a6371534dad4acdd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaf79d218bcde86838a6371534dad4acdd">IS_TIM_DMA_BASE</a>(__BASE__)</td></tr>
<tr class="memitem:gae4a44eb3977f1cba86a9179c8c7f6b36" id="r_gae4a44eb3977f1cba86a9179c8c7f6b36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gae4a44eb3977f1cba86a9179c8c7f6b36">IS_TIM_EVENT_SOURCE</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga51e09bf84a3abf86e47fa45047fd6506" id="r_ga51e09bf84a3abf86e47fa45047fd6506"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga51e09bf84a3abf86e47fa45047fd6506">IS_TIM_COUNTER_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:gae227149533a068ef2e2736c37837adbd" id="r_gae227149533a068ef2e2736c37837adbd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gae227149533a068ef2e2736c37837adbd">IS_TIM_UIFREMAP_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:gac7f7ba7f6f173631c81176d4602c2f11" id="r_gac7f7ba7f6f173631c81176d4602c2f11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gac7f7ba7f6f173631c81176d4602c2f11">IS_TIM_CLOCKDIVISION_DIV</a>(__DIV__)</td></tr>
<tr class="memitem:gab99bb1fa5b82450c33c693d19c2893e7" id="r_gab99bb1fa5b82450c33c693d19c2893e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gab99bb1fa5b82450c33c693d19c2893e7">IS_TIM_AUTORELOAD_PRELOAD</a>(PRELOAD)</td></tr>
<tr class="memitem:gaf65dbc2ef5f94e76d3a68bf71829760e" id="r_gaf65dbc2ef5f94e76d3a68bf71829760e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaf65dbc2ef5f94e76d3a68bf71829760e">IS_TIM_FAST_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:gaff2871b7c01f0b706f90feb046995b95" id="r_gaff2871b7c01f0b706f90feb046995b95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaff2871b7c01f0b706f90feb046995b95">IS_TIM_OC_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:gab196fb0e0bafa567b6888e72f0496a55" id="r_gab196fb0e0bafa567b6888e72f0496a55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gab196fb0e0bafa567b6888e72f0496a55">IS_TIM_OCN_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:ga7c2f6448bbecfc404a3644cc5c978789" id="r_ga7c2f6448bbecfc404a3644cc5c978789"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga7c2f6448bbecfc404a3644cc5c978789">IS_TIM_OCIDLE_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:ga716c8082a9f18e07c876aa528a3f128d" id="r_ga716c8082a9f18e07c876aa528a3f128d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga716c8082a9f18e07c876aa528a3f128d">IS_TIM_OCNIDLE_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:ga6fde3e02e00bbf2a87a6691580751205" id="r_ga6fde3e02e00bbf2a87a6691580751205"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga6fde3e02e00bbf2a87a6691580751205">IS_TIM_ENCODERINPUT_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:ga346707dd1b0915436ca3f58dcfbef3d5" id="r_ga346707dd1b0915436ca3f58dcfbef3d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga346707dd1b0915436ca3f58dcfbef3d5">IS_TIM_IC_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:ga3b370e1454433066201e9f09cb47173f" id="r_ga3b370e1454433066201e9f09cb47173f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga3b370e1454433066201e9f09cb47173f">IS_TIM_IC_SELECTION</a>(__SELECTION__)</td></tr>
<tr class="memitem:ga86558ff4924a0526ce7593db238a17ab" id="r_ga86558ff4924a0526ce7593db238a17ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga86558ff4924a0526ce7593db238a17ab">IS_TIM_IC_PRESCALER</a>(__PRESCALER__)</td></tr>
<tr class="memitem:ga98b550e4dc18241f947f83139552bd53" id="r_ga98b550e4dc18241f947f83139552bd53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga98b550e4dc18241f947f83139552bd53">IS_TIM_CCX_CHANNEL</a>(__INSTANCE__,  __CHANNEL__)</td></tr>
<tr class="memitem:ga38ab7126db5202ad9a465838160a805c" id="r_ga38ab7126db5202ad9a465838160a805c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga38ab7126db5202ad9a465838160a805c">IS_TIM_OPM_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:ga481a8b96f840e75c5df82a99ebabc778" id="r_ga481a8b96f840e75c5df82a99ebabc778"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga481a8b96f840e75c5df82a99ebabc778">IS_TIM_ENCODER_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:ga6a33061de13fdde7df1a85d2402e69c9" id="r_ga6a33061de13fdde7df1a85d2402e69c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga6a33061de13fdde7df1a85d2402e69c9">IS_TIM_DMA_SOURCE</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga3641d445a28293a77ddc2232e624a858" id="r_ga3641d445a28293a77ddc2232e624a858"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga3641d445a28293a77ddc2232e624a858">IS_TIM_CHANNELS</a>(__CHANNEL__)</td></tr>
<tr class="memitem:gab52ffb8447abc78141e296eff57c4371" id="r_gab52ffb8447abc78141e296eff57c4371"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gab52ffb8447abc78141e296eff57c4371">IS_TIM_OPM_CHANNELS</a>(__CHANNEL__)</td></tr>
<tr class="memitem:gaf7c48e47778b71c5534c89c45a4f16c6" id="r_gaf7c48e47778b71c5534c89c45a4f16c6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaf7c48e47778b71c5534c89c45a4f16c6">IS_TIM_PERIOD</a>(__HANDLE__,  __PERIOD__)</td></tr>
<tr class="memitem:ga9fc980a033653d2bfc5d7afe9b65ca9f" id="r_ga9fc980a033653d2bfc5d7afe9b65ca9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga9fc980a033653d2bfc5d7afe9b65ca9f">IS_TIM_COMPLEMENTARY_CHANNELS</a>(__CHANNEL__)</td></tr>
<tr class="memitem:gaebd00b3c8dd1c689e9d04850333ba719" id="r_gaebd00b3c8dd1c689e9d04850333ba719"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaebd00b3c8dd1c689e9d04850333ba719">IS_TIM_CLOCKSOURCE</a>(__CLOCK__)</td></tr>
<tr class="memitem:ga9bc34f35e8001150847d8cb4c7106fe9" id="r_ga9bc34f35e8001150847d8cb4c7106fe9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga9bc34f35e8001150847d8cb4c7106fe9">IS_TIM_CLOCKPOLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:gacffcfebcabdbe12264d1f09775693972" id="r_gacffcfebcabdbe12264d1f09775693972"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gacffcfebcabdbe12264d1f09775693972">IS_TIM_CLOCKPRESCALER</a>(__PRESCALER__)</td></tr>
<tr class="memitem:ga7e2a89ace1305fce9bec2cf6d290389f" id="r_ga7e2a89ace1305fce9bec2cf6d290389f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga7e2a89ace1305fce9bec2cf6d290389f">IS_TIM_CLOCKFILTER</a>(__ICFILTER__)</td></tr>
<tr class="memitem:ga0e0cafe2b21ee029a89cba1a400fa21c" id="r_ga0e0cafe2b21ee029a89cba1a400fa21c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga0e0cafe2b21ee029a89cba1a400fa21c">IS_TIM_CLEARINPUT_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:ga861bb16ad77e0ede52a3d5f296583d0b" id="r_ga861bb16ad77e0ede52a3d5f296583d0b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga861bb16ad77e0ede52a3d5f296583d0b">IS_TIM_CLEARINPUT_PRESCALER</a>(__PRESCALER__)</td></tr>
<tr class="memitem:gaf8f726fb3929b2fe50099b21eec9a738" id="r_gaf8f726fb3929b2fe50099b21eec9a738"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaf8f726fb3929b2fe50099b21eec9a738">IS_TIM_CLEARINPUT_FILTER</a>(__ICFILTER__)</td></tr>
<tr class="memitem:ga9781b1128c61785dd818f64d83f4cb77" id="r_ga9781b1128c61785dd818f64d83f4cb77"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga9781b1128c61785dd818f64d83f4cb77">IS_TIM_OSSR_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:gaf5097557634d53d3f9438cf222e2192b" id="r_gaf5097557634d53d3f9438cf222e2192b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaf5097557634d53d3f9438cf222e2192b">IS_TIM_OSSI_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:gad53d9e9b4fa060db29f3900b3dfcb3ed" id="r_gad53d9e9b4fa060db29f3900b3dfcb3ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gad53d9e9b4fa060db29f3900b3dfcb3ed">IS_TIM_LOCK_LEVEL</a>(__LEVEL__)</td></tr>
<tr class="memitem:ga6eb4b934436eb7afd965214963abfb62" id="r_ga6eb4b934436eb7afd965214963abfb62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga6eb4b934436eb7afd965214963abfb62">IS_TIM_BREAK_FILTER</a>(__BRKFILTER__)</td></tr>
<tr class="memitem:ga74dc07721b4a34a59194df534fb5fdd8" id="r_ga74dc07721b4a34a59194df534fb5fdd8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga74dc07721b4a34a59194df534fb5fdd8">IS_TIM_BREAK_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:ga42d1d6f041253c2a07ddee8d4411e2db" id="r_ga42d1d6f041253c2a07ddee8d4411e2db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga42d1d6f041253c2a07ddee8d4411e2db">IS_TIM_BREAK_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:ga400c722e50eb4f2cecdf1d9e8415f926" id="r_ga400c722e50eb4f2cecdf1d9e8415f926"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga400c722e50eb4f2cecdf1d9e8415f926">IS_TIM_BREAK2_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:gabd7395f6fc431e648b2dcf57cb562d9d" id="r_gabd7395f6fc431e648b2dcf57cb562d9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gabd7395f6fc431e648b2dcf57cb562d9d">IS_TIM_BREAK2_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:gab060abc03ca5cd3421a9279a5403cea3" id="r_gab060abc03ca5cd3421a9279a5403cea3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gab060abc03ca5cd3421a9279a5403cea3">IS_TIM_AUTOMATIC_OUTPUT_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:ga54904efe573e3ce6d13faf96d7ec5e4c" id="r_ga54904efe573e3ce6d13faf96d7ec5e4c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga54904efe573e3ce6d13faf96d7ec5e4c">IS_TIM_GROUPCH5</a>(__OCREF__)</td></tr>
<tr class="memitem:ga9c59624b1c4a60f39385da551ab31e53" id="r_ga9c59624b1c4a60f39385da551ab31e53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga9c59624b1c4a60f39385da551ab31e53">IS_TIM_TRGO_SOURCE</a>(__SOURCE__)</td></tr>
<tr class="memitem:ga33da13e91d556aeed63a2c85e2f81340" id="r_ga33da13e91d556aeed63a2c85e2f81340"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga33da13e91d556aeed63a2c85e2f81340">IS_TIM_TRGO2_SOURCE</a>(__SOURCE__)</td></tr>
<tr class="memitem:gafac5c2fba615264d7a1de6f85cfccc9a" id="r_gafac5c2fba615264d7a1de6f85cfccc9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gafac5c2fba615264d7a1de6f85cfccc9a">IS_TIM_MSM_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:gafce89506518ce113eb70e424f4dc1c5b" id="r_gafce89506518ce113eb70e424f4dc1c5b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gafce89506518ce113eb70e424f4dc1c5b">IS_TIM_SLAVE_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:ga7274d2a669edfcb25bcf610ec85a528b" id="r_ga7274d2a669edfcb25bcf610ec85a528b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga7274d2a669edfcb25bcf610ec85a528b">IS_TIM_PWM_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:gac6968ae64781c2bda9f8714fe45917d0" id="r_gac6968ae64781c2bda9f8714fe45917d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gac6968ae64781c2bda9f8714fe45917d0">IS_TIM_OC_MODE</a>(__MODE__)</td></tr>
<tr class="memitem:ga31d479d785a28d48bd66fdca38b48d91" id="r_ga31d479d785a28d48bd66fdca38b48d91"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga31d479d785a28d48bd66fdca38b48d91">IS_TIM_TRIGGER_SELECTION</a>(__SELECTION__)</td></tr>
<tr class="memitem:ga48eee98612db56131414fdacc7a5743d" id="r_ga48eee98612db56131414fdacc7a5743d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga48eee98612db56131414fdacc7a5743d">IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION</a>(__SELECTION__)</td></tr>
<tr class="memitem:ga4389836fe0783c8661deb7b7d58dd217" id="r_ga4389836fe0783c8661deb7b7d58dd217"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga4389836fe0783c8661deb7b7d58dd217">IS_TIM_TRIGGERPOLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:gac38c7d0c59f17b5a6d9ff01b82ddae43" id="r_gac38c7d0c59f17b5a6d9ff01b82ddae43"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gac38c7d0c59f17b5a6d9ff01b82ddae43">IS_TIM_TRIGGERPRESCALER</a>(__PRESCALER__)</td></tr>
<tr class="memitem:gab1d40d533bb6edb9920f682ab8b4f96a" id="r_gab1d40d533bb6edb9920f682ab8b4f96a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gab1d40d533bb6edb9920f682ab8b4f96a">IS_TIM_TRIGGERFILTER</a>(__ICFILTER__)</td></tr>
<tr class="memitem:ga6198cc86401c7b2ca26f5074847cda13" id="r_ga6198cc86401c7b2ca26f5074847cda13"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga6198cc86401c7b2ca26f5074847cda13">IS_TIM_TI1SELECTION</a>(__TI1SELECTION__)</td></tr>
<tr class="memitem:ga58ca64223d434407d8e83ab34dd39f79" id="r_ga58ca64223d434407d8e83ab34dd39f79"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga58ca64223d434407d8e83ab34dd39f79">IS_TIM_DMA_LENGTH</a>(__LENGTH__)</td></tr>
<tr class="memitem:ga86128a4ac02deae26cbf8597b5acb71f" id="r_ga86128a4ac02deae26cbf8597b5acb71f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga86128a4ac02deae26cbf8597b5acb71f">IS_TIM_DMA_DATA_LENGTH</a>(LENGTH)</td></tr>
<tr class="memitem:ga3844dc9afbc0894bf6ba16f1d3cb656c" id="r_ga3844dc9afbc0894bf6ba16f1d3cb656c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga3844dc9afbc0894bf6ba16f1d3cb656c">IS_TIM_IC_FILTER</a>(__ICFILTER__)</td></tr>
<tr class="memitem:ga223fe03967fab834c92f4159fa2e2817" id="r_ga223fe03967fab834c92f4159fa2e2817"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga223fe03967fab834c92f4159fa2e2817">IS_TIM_DEADTIME</a>(__DEADTIME__)</td></tr>
<tr class="memitem:ga4b2311c31b0866902e1ca922641aa1b2" id="r_ga4b2311c31b0866902e1ca922641aa1b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga4b2311c31b0866902e1ca922641aa1b2">IS_TIM_BREAK_SYSTEM</a>(__CONFIG__)</td></tr>
<tr class="memitem:ga44d4f84407e34dbd1ac3ccba12684975" id="r_ga44d4f84407e34dbd1ac3ccba12684975"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga44d4f84407e34dbd1ac3ccba12684975">IS_TIM_SLAVEMODE_TRIGGER_ENABLED</a>(__TRIGGER__)</td></tr>
<tr class="memitem:ga99724157918ca8b4d8babee1d8008dcb" id="r_ga99724157918ca8b4d8babee1d8008dcb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga99724157918ca8b4d8babee1d8008dcb">TIM_SET_ICPRESCALERVALUE</a>(__HANDLE__,  __CHANNEL__,  __ICPSC__)</td></tr>
<tr class="memitem:ga18ded32faf42c8981c8d2970bb02e126" id="r_ga18ded32faf42c8981c8d2970bb02e126"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga18ded32faf42c8981c8d2970bb02e126">TIM_RESET_ICPRESCALERVALUE</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memitem:ga4321d7371ca3a8c18f96e925667a7b2f" id="r_ga4321d7371ca3a8c18f96e925667a7b2f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga4321d7371ca3a8c18f96e925667a7b2f">TIM_SET_CAPTUREPOLARITY</a>(__HANDLE__,  __CHANNEL__,  __POLARITY__)</td></tr>
<tr class="memitem:gada7535acf7e1f9b3e8e1dcca848871db" id="r_gada7535acf7e1f9b3e8e1dcca848871db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gada7535acf7e1f9b3e8e1dcca848871db">TIM_RESET_CAPTUREPOLARITY</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memitem:gaefd768fd7120d0e8bc22cafc8303a930" id="r_gaefd768fd7120d0e8bc22cafc8303a930"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaefd768fd7120d0e8bc22cafc8303a930">TIM_CHANNEL_STATE_GET</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memitem:ga9bf92b78a3dd534ed021a44a4a5824ff" id="r_ga9bf92b78a3dd534ed021a44a4a5824ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga9bf92b78a3dd534ed021a44a4a5824ff">TIM_CHANNEL_STATE_SET</a>(__HANDLE__,  __CHANNEL__,  __CHANNEL_STATE__)</td></tr>
<tr class="memitem:gaf2bd9a020691eb1463c082546929ede0" id="r_gaf2bd9a020691eb1463c082546929ede0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gaf2bd9a020691eb1463c082546929ede0">TIM_CHANNEL_STATE_SET_ALL</a>(__HANDLE__,  __CHANNEL_STATE__)</td></tr>
<tr class="memitem:ga3eda34765f4b4b6cd6d9004472685fda" id="r_ga3eda34765f4b4b6cd6d9004472685fda"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga3eda34765f4b4b6cd6d9004472685fda">TIM_CHANNEL_N_STATE_GET</a>(__HANDLE__,  __CHANNEL__)</td></tr>
<tr class="memitem:gabfd38a906ce1cd122128971e1c075645" id="r_gabfd38a906ce1cd122128971e1c075645"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#gabfd38a906ce1cd122128971e1c075645">TIM_CHANNEL_N_STATE_SET</a>(__HANDLE__,  __CHANNEL__,  __CHANNEL_STATE__)</td></tr>
<tr class="memitem:ga7406c337229adde356e6c72931da578a" id="r_ga7406c337229adde356e6c72931da578a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___private___macros.html#ga7406c337229adde356e6c72931da578a">TIM_CHANNEL_N_STATE_SET_ALL</a>(__HANDLE__,  __CHANNEL_STATE__)</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-enum-members" class="groupheader"><a id="enum-members" name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:gae0994cf5970e56ca4903e9151f40010c" id="r_gae0994cf5970e56ca4903e9151f40010c"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a> { <br />
&#160;&#160;<a class="el" href="group___t_i_m___exported___types.html#ggae0994cf5970e56ca4903e9151f40010ca28011b79e60b74a6c55947c505c51cbc">HAL_TIM_STATE_RESET</a> = 0x00U
, <a class="el" href="group___t_i_m___exported___types.html#ggae0994cf5970e56ca4903e9151f40010ca4545554d7fa04d17e78d69d17cb7e4b3">HAL_TIM_STATE_READY</a> = 0x01U
, <a class="el" href="group___t_i_m___exported___types.html#ggae0994cf5970e56ca4903e9151f40010ca1ddbfef19ad0562eb8143919b710cc12">HAL_TIM_STATE_BUSY</a> = 0x02U
, <a class="el" href="group___t_i_m___exported___types.html#ggae0994cf5970e56ca4903e9151f40010ca03e3339df71a74ac37820f72c2989371">HAL_TIM_STATE_TIMEOUT</a> = 0x03U
, <br />
&#160;&#160;<a class="el" href="group___t_i_m___exported___types.html#ggae0994cf5970e56ca4903e9151f40010ca318cceb243cb9ca9e01833913e4f90ea">HAL_TIM_STATE_ERROR</a> = 0x04U
<br />
 }</td></tr>
<tr class="memdesc:gae0994cf5970e56ca4903e9151f40010c"><td class="mdescLeft">&#160;</td><td class="mdescRight">HAL State structures definition.  <a href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">More...</a><br /></td></tr>
<tr class="memitem:ga1a70fcbe9952e18af5c890e216a15f34" id="r_ga1a70fcbe9952e18af5c890e216a15f34"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a> { <a class="el" href="group___t_i_m___exported___types.html#gga1a70fcbe9952e18af5c890e216a15f34a430f7e41a278868bc1a7c5de6a08dc94">HAL_TIM_CHANNEL_STATE_RESET</a> = 0x00U
, <a class="el" href="group___t_i_m___exported___types.html#gga1a70fcbe9952e18af5c890e216a15f34a38f4c5665247f7c997d0b200ed7ccc0e">HAL_TIM_CHANNEL_STATE_READY</a> = 0x01U
, <a class="el" href="group___t_i_m___exported___types.html#gga1a70fcbe9952e18af5c890e216a15f34ad5dca7086716ee2cde9aaccaefd838ff">HAL_TIM_CHANNEL_STATE_BUSY</a> = 0x02U
 }</td></tr>
<tr class="memdesc:ga1a70fcbe9952e18af5c890e216a15f34"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Channel States definition.  <a href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">More...</a><br /></td></tr>
<tr class="memitem:ga9b87df539778a60ea940a9d5ba793f7c" id="r_ga9b87df539778a60ea940a9d5ba793f7c"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___types.html#ga9b87df539778a60ea940a9d5ba793f7c">HAL_TIM_DMABurstStateTypeDef</a> { <a class="el" href="group___t_i_m___exported___types.html#gga9b87df539778a60ea940a9d5ba793f7ca98c26cb59bb0c07b7f020d7ff8678bb8">HAL_DMA_BURST_STATE_RESET</a> = 0x00U
, <a class="el" href="group___t_i_m___exported___types.html#gga9b87df539778a60ea940a9d5ba793f7ca44e8b59c22cd2b17d449b120e03e4952">HAL_DMA_BURST_STATE_READY</a> = 0x01U
, <a class="el" href="group___t_i_m___exported___types.html#gga9b87df539778a60ea940a9d5ba793f7ca2de45462aabea1ed8b0d249441404e82">HAL_DMA_BURST_STATE_BUSY</a> = 0x02U
 }</td></tr>
<tr class="memdesc:ga9b87df539778a60ea940a9d5ba793f7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Burst States definition.  <a href="group___t_i_m___exported___types.html#ga9b87df539778a60ea940a9d5ba793f7c">More...</a><br /></td></tr>
<tr class="memitem:gaa3fa7bcbb4707f1151ccfc90a8cf9706" id="r_gaa3fa7bcbb4707f1151ccfc90a8cf9706"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___types.html#gaa3fa7bcbb4707f1151ccfc90a8cf9706">HAL_TIM_ActiveChannel</a> { <br />
&#160;&#160;<a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706a2024e95c48b58ec9b2115faa276e3fad">HAL_TIM_ACTIVE_CHANNEL_1</a> = 0x01U
, <a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706ae80e6a1dd1c479f504219c0fec2f3322">HAL_TIM_ACTIVE_CHANNEL_2</a> = 0x02U
, <a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706acc3fcf4ee6d91744c4bc6a5eccde2601">HAL_TIM_ACTIVE_CHANNEL_3</a> = 0x04U
, <a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706a7d98ec7e385cacb3aaa6cec601fa6ab6">HAL_TIM_ACTIVE_CHANNEL_4</a> = 0x08U
, <br />
&#160;&#160;<a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706a50b9b4be055407e9f566d8da0a7e07cc">HAL_TIM_ACTIVE_CHANNEL_5</a> = 0x10U
, <a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706a368a574b486286c87f763957a0ef9d93">HAL_TIM_ACTIVE_CHANNEL_6</a> = 0x20U
, <a class="el" href="group___t_i_m___exported___types.html#ggaa3fa7bcbb4707f1151ccfc90a8cf9706a574f72ac3bb41fe660318aa42dfdc98d">HAL_TIM_ACTIVE_CHANNEL_CLEARED</a> = 0x00U
<br />
 }</td></tr>
<tr class="memdesc:gaa3fa7bcbb4707f1151ccfc90a8cf9706"><td class="mdescLeft">&#160;</td><td class="mdescRight">HAL Active channel structures definition.  <a href="group___t_i_m___exported___types.html#gaa3fa7bcbb4707f1151ccfc90a8cf9706">More...</a><br /></td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-func-members" class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga1b288eb68eb52c97b8d187cdd6e9088f" id="r_ga1b288eb68eb52c97b8d187cdd6e9088f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gaaf97adbc39e48456a1c83c54895de83b" id="r_gaaf97adbc39e48456a1c83c54895de83b"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga818f4d5d1e2f417438d281b4ac9efb9c" id="r_ga818f4d5d1e2f417438d281b4ac9efb9c"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga13352a6c9cb3225511e5f29dbb894e84" id="r_ga13352a6c9cb3225511e5f29dbb894e84"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gaf7e5ee80207a338050413e14f7bd24f9" id="r_gaf7e5ee80207a338050413e14f7bd24f9"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga78697261126cd2facc463b81e8c4b238" id="r_ga78697261126cd2facc463b81e8c4b238"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gae517d80e2ac713069767df8e8915971e" id="r_gae517d80e2ac713069767df8e8915971e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga19443605c97f15b5ede7d8337534ece4" id="r_ga19443605c97f15b5ede7d8337534ece4"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga263ffa0db8285daa9ca0010690079203" id="r_ga263ffa0db8285daa9ca0010690079203"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:ga7673776de6e35f5cbe887e62e13e87b5" id="r_ga7673776de6e35f5cbe887e62e13e87b5"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga7541c3db71ec7c0b4b54afa473bdb19a" id="r_ga7541c3db71ec7c0b4b54afa473bdb19a"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga79f0c3e3015a81c535a578edc2fee8ca" id="r_ga79f0c3e3015a81c535a578edc2fee8ca"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gab7ea7555b79c4544ad90dc6d063d2f13" id="r_gab7ea7555b79c4544ad90dc6d063d2f13"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga2f01705566708fcaceb32bcad01f7498" id="r_ga2f01705566708fcaceb32bcad01f7498"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga5dbbafc75b341b79d29bc41f8ec15492" id="r_ga5dbbafc75b341b79d29bc41f8ec15492"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga9cb1f62afb99aea0db8cc28b378b68ad" id="r_ga9cb1f62afb99aea0db8cc28b378b68ad"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gad3116f3b344392f7b947ff1218ba9ed8" id="r_gad3116f3b344392f7b947ff1218ba9ed8"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gacc324ef35c0b207a8331c657d86fc1bd" id="r_gacc324ef35c0b207a8331c657d86fc1bd"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga1e4410b534d2381ff535bb987f340cba" id="r_ga1e4410b534d2381ff535bb987f340cba"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:ga27f1f66d2d38ec428580a5feb3628c48" id="r_ga27f1f66d2d38ec428580a5feb3628c48"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga25824b2eed564cc37a8983b99a83bdc7" id="r_ga25824b2eed564cc37a8983b99a83bdc7"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga5bb7b197ace5bab9ef120163ff1520bd" id="r_ga5bb7b197ace5bab9ef120163ff1520bd"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gaf94d3d2003a4eebed73744ccd5c85974" id="r_gaf94d3d2003a4eebed73744ccd5c85974"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga3abff1ab9a918c30db77c7890e6e2b07" id="r_ga3abff1ab9a918c30db77c7890e6e2b07"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga11da9bda53a5d21c293bb01da91e592d" id="r_ga11da9bda53a5d21c293bb01da91e592d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gae087011858379feeb770ecb4568829d3" id="r_gae087011858379feeb770ecb4568829d3"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gaca1f5fbc35101d0fc7e8af31c9a0c26c" id="r_gaca1f5fbc35101d0fc7e8af31c9a0c26c"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga0559af125dc5fb2bb183a6a4b86808b5" id="r_ga0559af125dc5fb2bb183a6a4b86808b5"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga3621f6126e33c1abb80cb572499f335c" id="r_ga3621f6126e33c1abb80cb572499f335c"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:gad77367f9b8d8d17842a913f7d6ce274b" id="r_gad77367f9b8d8d17842a913f7d6ce274b"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga342aa1098891f55f59c7867afff589c1" id="r_ga342aa1098891f55f59c7867afff589c1"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga2fc9af96c4ec45ba9057e182012f3586" id="r_ga2fc9af96c4ec45ba9057e182012f3586"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga202723f23bc46b29b16145f9cceabbbb" id="r_ga202723f23bc46b29b16145f9cceabbbb"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gad1aa484ec0f0559908d9d8128614e7ad" id="r_gad1aa484ec0f0559908d9d8128614e7ad"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gaab393018ca6f8fad04a815feb1796ce7" id="r_gaab393018ca6f8fad04a815feb1796ce7"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga1b5edb103cb27dbd5380e9b24d12658f" id="r_ga1b5edb103cb27dbd5380e9b24d12658f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gac0e3515f374ec6b9d30609cd683649d6" id="r_gac0e3515f374ec6b9d30609cd683649d6"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gaf5664e207667c99ef50378813056e5f6" id="r_gaf5664e207667c99ef50378813056e5f6"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gac3b7deffff43a8bdc3e2eea42115efff" id="r_gac3b7deffff43a8bdc3e2eea42115efff"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:ga8e7dc17f058ef9c826774436d68f80b5" id="r_ga8e7dc17f058ef9c826774436d68f80b5"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga476d67a220c23ebdc69fac7b09dbaa72" id="r_ga476d67a220c23ebdc69fac7b09dbaa72"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OnePulseMode)</td></tr>
<tr class="memitem:gae60b468b11199522c6c83a943439c7b7" id="r_gae60b468b11199522c6c83a943439c7b7"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga6579726753cb2b769a21d10bec75219f" id="r_ga6579726753cb2b769a21d10bec75219f"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga9b73c7135e8348613f30f3a4d84478e7" id="r_ga9b73c7135e8348613f30f3a4d84478e7"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga40e43e4f2484df59079e0316d6a6fd23" id="r_ga40e43e4f2484df59079e0316d6a6fd23"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:gac7744a2a063e8bf2909319d70fc764fd" id="r_gac7744a2a063e8bf2909319d70fc764fd"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:gafcde302725d20c6f992f26660d491bb9" id="r_gafcde302725d20c6f992f26660d491bb9"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:ga6bbce5414404228fde71dadd8d1cddc7" id="r_ga6bbce5414404228fde71dadd8d1cddc7"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:gabbd8d70ab36161f83e1c09087789955d" id="r_gabbd8d70ab36161f83e1c09087789955d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___encoder___init_type_def.html">TIM_Encoder_InitTypeDef</a> *sConfig)</td></tr>
<tr class="memitem:gaaf99281fd7635e20c08e48bfc9ea11e3" id="r_gaaf99281fd7635e20c08e48bfc9ea11e3"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga1a8e1103bfcc56c2626ed5cf546391d1" id="r_ga1a8e1103bfcc56c2626ed5cf546391d1"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga77c8216735a5b1374ea948737eed8a18" id="r_ga77c8216735a5b1374ea948737eed8a18"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga6450b21fa2bf6bf71a0f85c0a1519e21" id="r_ga6450b21fa2bf6bf71a0f85c0a1519e21"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga2d603e9167803b080be1f2915e972bbf" id="r_ga2d603e9167803b080be1f2915e972bbf"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga9a573a3203752709841acab8412f541e" id="r_ga9a573a3203752709841acab8412f541e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gac07923b4764255a1e0b82c975689542d" id="r_gac07923b4764255a1e0b82c975689542d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga8b9798534ad0917d31d581afe720d8cf" id="r_ga8b9798534ad0917d31d581afe720d8cf"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)</td></tr>
<tr class="memitem:ga12ea48505e269532feff5b64f605b56f" id="r_ga12ea48505e269532feff5b64f605b56f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga2dc3ef34340412aa8a01d734d2ff8f88" id="r_ga2dc3ef34340412aa8a01d734d2ff8f88"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IRQHandler</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga8fb64ba07b18cc24f8f9191369ed2d02" id="r_ga8fb64ba07b18cc24f8f9191369ed2d02"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_ConfigChannel</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___o_c___init_type_def.html">TIM_OC_InitTypeDef</a> *sConfig, uint32_t Channel)</td></tr>
<tr class="memitem:ga258d2356d817adaa3d39d2d0b6de9223" id="r_ga258d2356d817adaa3d39d2d0b6de9223"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_ConfigChannel</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___o_c___init_type_def.html">TIM_OC_InitTypeDef</a> *sConfig, uint32_t Channel)</td></tr>
<tr class="memitem:ga031c508e41997d53c059665ebd3638a3" id="r_ga031c508e41997d53c059665ebd3638a3"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_ConfigChannel</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___i_c___init_type_def.html">TIM_IC_InitTypeDef</a> *sConfig, uint32_t Channel)</td></tr>
<tr class="memitem:gaefb1913440053c45a4f9a50a8c05c6be" id="r_gaefb1913440053c45a4f9a50a8c05c6be"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_ConfigChannel</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, <a class="el" href="struct_t_i_m___one_pulse___init_type_def.html">TIM_OnePulse_InitTypeDef</a> *sConfig, uint32_t OutputChannel, uint32_t InputChannel)</td></tr>
<tr class="memitem:gae194787f5481c163b6eec962ed7ff205" id="r_gae194787f5481c163b6eec962ed7ff205"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_ConfigOCrefClear</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___clear_input_config_type_def.html">TIM_ClearInputConfigTypeDef</a> *sClearInputConfig, uint32_t Channel)</td></tr>
<tr class="memitem:gaa29ed013caefca2a181a1cabac66d521" id="r_gaa29ed013caefca2a181a1cabac66d521"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_ConfigClockSource</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___clock_config_type_def.html">TIM_ClockConfigTypeDef</a> *sClockSourceConfig)</td></tr>
<tr class="memitem:ga7dfab2adafd2f2e315a9531f1150c201" id="r_ga7dfab2adafd2f2e315a9531f1150c201"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_ConfigTI1Input</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t TI1_Selection)</td></tr>
<tr class="memitem:ga50ddcf971c747fa974c7b89ff5d3fe18" id="r_ga50ddcf971c747fa974c7b89ff5d3fe18"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_SlaveConfigSynchro</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___slave_config_type_def.html">TIM_SlaveConfigTypeDef</a> *sSlaveConfig)</td></tr>
<tr class="memitem:ga5ac6bc06273d5b5b848eda023a32fe2f" id="r_ga5ac6bc06273d5b5b848eda023a32fe2f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_SlaveConfigSynchro_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___slave_config_type_def.html">TIM_SlaveConfigTypeDef</a> *sSlaveConfig)</td></tr>
<tr class="memitem:ga35788d18e435d06a76a40fda5d6c13e7" id="r_ga35788d18e435d06a76a40fda5d6c13e7"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurst_WriteStart</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength)</td></tr>
<tr class="memitem:ga0c198603c11b2e0140dabd8dcdb5a0ff" id="r_ga0c198603c11b2e0140dabd8dcdb5a0ff"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurst_MultiWriteStart</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength)</td></tr>
<tr class="memitem:ga8f5649baaf219f2559bbe9e8e2c3658e" id="r_ga8f5649baaf219f2559bbe9e8e2c3658e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurst_WriteStop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t BurstRequestSrc)</td></tr>
<tr class="memitem:ga39c612c473747448615e2e3cb2668224" id="r_ga39c612c473747448615e2e3cb2668224"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurst_ReadStart</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)</td></tr>
<tr class="memitem:ga741807469bb3349d9a63fb492d277b41" id="r_ga741807469bb3349d9a63fb492d277b41"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurst_MultiReadStart</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength)</td></tr>
<tr class="memitem:ga41cfa290ee87229cba1962e78e2a9d01" id="r_ga41cfa290ee87229cba1962e78e2a9d01"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurst_ReadStop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t BurstRequestSrc)</td></tr>
<tr class="memitem:gab4a60fe7cbb64a321bdce2ee1b9c8730" id="r_gab4a60fe7cbb64a321bdce2ee1b9c8730"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_GenerateEvent</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t EventSource)</td></tr>
<tr class="memitem:ga726cf270b20654c4094da3eca1648f92" id="r_ga726cf270b20654c4094da3eca1648f92"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_ReadCapturedValue</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga8a3b0ad512a6e6c6157440b68d395eac" id="r_ga8a3b0ad512a6e6c6157440b68d395eac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___functions___group9.html#ga8a3b0ad512a6e6c6157440b68d395eac">HAL_TIM_PeriodElapsedCallback</a> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memdesc:ga8a3b0ad512a6e6c6157440b68d395eac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Period elapsed callback in non blocking mode.  <br /></td></tr>
<tr class="memitem:ga1f7478d689916e5888f62f97cf4acef3" id="r_ga1f7478d689916e5888f62f97cf4acef3"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PeriodElapsedHalfCpltCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga1fc39499fe9db8b7fb88005e9f107a36" id="r_ga1fc39499fe9db8b7fb88005e9f107a36"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_DelayElapsedCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga77a2401a35ddd9bd0b8fc28331b81381" id="r_ga77a2401a35ddd9bd0b8fc28331b81381"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_CaptureCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga25ada83fb758075401f1bb9ba1925322" id="r_ga25ada83fb758075401f1bb9ba1925322"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_CaptureHalfCpltCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga07e5fc4d223b16bec2fd6bed547cf91d" id="r_ga07e5fc4d223b16bec2fd6bed547cf91d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___exported___functions___group9.html#ga07e5fc4d223b16bec2fd6bed547cf91d">HAL_TIM_PWM_PulseFinishedCallback</a> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memdesc:ga07e5fc4d223b16bec2fd6bed547cf91d"><td class="mdescLeft">&#160;</td><td class="mdescRight">pwm dma传输完成回调函数  <br /></td></tr>
<tr class="memitem:gaf669ea0eacb07d5fee199704b612841f" id="r_gaf669ea0eacb07d5fee199704b612841f"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_PulseFinishedHalfCpltCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga189577c72b1963671b26820d8161d678" id="r_ga189577c72b1963671b26820d8161d678"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_TriggerCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga6fb4827960b3fcbc72f81152c3c7a2c3" id="r_ga6fb4827960b3fcbc72f81152c3c7a2c3"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_TriggerHalfCpltCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga6f0868af383d592940700dbb52fac016" id="r_ga6f0868af383d592940700dbb52fac016"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_ErrorCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga42bb3b65bc8be378b82748feb9898b75" id="r_ga42bb3b65bc8be378b82748feb9898b75"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Base_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gad1aa07ea9327c409b78b36fe0ed78a6e" id="r_gad1aa07ea9327c409b78b36fe0ed78a6e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OC_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga795c42446ffd11385c8b66087fe695f6" id="r_ga795c42446ffd11385c8b66087fe695f6"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_PWM_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga39d5fb67dc3867b6f9bd6a0a99fa0b82" id="r_ga39d5fb67dc3867b6f9bd6a0a99fa0b82"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_IC_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga28deed8246fb5225ee2ae354250e8e37" id="r_ga28deed8246fb5225ee2ae354250e8e37"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_OnePulse_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga727c46df756e06eb4730ab5413c52b6d" id="r_ga727c46df756e06eb4730ab5413c52b6d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_Encoder_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga878b1bc139a257de3a427b235cd639f3" id="r_ga878b1bc139a257de3a427b235cd639f3"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gaa3fa7bcbb4707f1151ccfc90a8cf9706">HAL_TIM_ActiveChannel</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_GetActiveChannel</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga3ce6635814be512115f217d3ad798a64" id="r_ga3ce6635814be512115f217d3ad798a64"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_GetChannelState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gac66bce244fd83b4a1ef9cc5a594f8ac5" id="r_gac66bce244fd83b4a1ef9cc5a594f8ac5"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#ga9b87df539778a60ea940a9d5ba793f7c">HAL_TIM_DMABurstStateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIM_DMABurstState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gae0f82ff07c1973cf4fb132740a8e24ae" id="r_gae0f82ff07c1973cf4fb132740a8e24ae"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_Base_SetConfig</b> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, const <a class="el" href="struct_t_i_m___base___init_type_def.html">TIM_Base_InitTypeDef</a> *Structure)</td></tr>
<tr class="memitem:ga83c847710a92f0558c862dd0dc889ff3" id="r_ga83c847710a92f0558c862dd0dc889ff3"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_TI1_SetConfig</b> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter)</td></tr>
<tr class="memitem:ga5d921b105aeea15c381e7a265af9092e" id="r_ga5d921b105aeea15c381e7a265af9092e"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_OC2_SetConfig</b> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, const <a class="el" href="struct_t_i_m___o_c___init_type_def.html">TIM_OC_InitTypeDef</a> *OC_Config)</td></tr>
<tr class="memitem:ga0dc6b90093e2510142a5b21d75e025e0" id="r_ga0dc6b90093e2510142a5b21d75e025e0"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_ETR_SetConfig</b> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)</td></tr>
<tr class="memitem:ga8bfc333f26980f4e473a75cdb45de292" id="r_ga8bfc333f26980f4e473a75cdb45de292"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMADelayPulseHalfCplt</b> (<a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *hdma)</td></tr>
<tr class="memitem:gaa112bee5279feee040c1ea9e283f7378" id="r_gaa112bee5279feee040c1ea9e283f7378"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMAError</b> (<a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *hdma)</td></tr>
<tr class="memitem:ga60b9c315720fddb3db32299f05f7d712" id="r_ga60b9c315720fddb3db32299f05f7d712"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMACaptureCplt</b> (<a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *hdma)</td></tr>
<tr class="memitem:ga2c2f2f092eaa9414661422f06fdc56a0" id="r_ga2c2f2f092eaa9414661422f06fdc56a0"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_DMACaptureHalfCplt</b> (<a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *hdma)</td></tr>
<tr class="memitem:ga7fcc6d5ca311c37f5d0250687c899924" id="r_ga7fcc6d5ca311c37f5d0250687c899924"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIM_CCxChannelCmd</b> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Channel, uint32_t ChannelState)</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Header file of TIM HAL module. </p>
<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
<p>Copyright (c) 2017 STMicroelectronics. All rights reserved.</p>
<p>This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS. </p>
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